JPS5718165A - Television synchronizing signal separation system - Google Patents
Television synchronizing signal separation systemInfo
- Publication number
- JPS5718165A JPS5718165A JP9358980A JP9358980A JPS5718165A JP S5718165 A JPS5718165 A JP S5718165A JP 9358980 A JP9358980 A JP 9358980A JP 9358980 A JP9358980 A JP 9358980A JP S5718165 A JPS5718165 A JP S5718165A
- Authority
- JP
- Japan
- Prior art keywords
- counting
- signal
- synchronizing signal
- separated
- vertical synchronizing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/08—Separation of synchronising signals from picture signals
- H04N5/10—Separation of line synchronising signal from frame synchronising signal or vice versa
Abstract
PURPOSE:To recognize a vertical synchronizing signal and to separated the vertical synchronizing signal, by detecting an equalizing pulse width and its period, and also counting and deciding the number of times of a sequence of its prescribed relation. CONSTITUTION:A television signal is inputted to a comparator 12 whose threshold level has been set by a reference electric power source 11, and is synchronization- separated. The signal which has been synchronization-separated in provided to a synchronizing separator 13, and also, on the one hand, it is applied to a reset terminal of the first counting circuit 14 for counting a high speed clock, and on the other hand, it is reversed through an inverter 15 and is applied to a reset terminal of the second counting circuit 16 for counting a high speed clock. The counting circuits 14, 16 count complementarily in a ''1'' level period and a ''0'' level period of an output of the comparator 12. A counting circuit 19 counts only in case when a synchronizing separation signal is being detecte, and when it has attained to a prescribed value, it is detected and is outputted as a vertical synchronizing signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9358980A JPS5718165A (en) | 1980-07-09 | 1980-07-09 | Television synchronizing signal separation system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9358980A JPS5718165A (en) | 1980-07-09 | 1980-07-09 | Television synchronizing signal separation system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5718165A true JPS5718165A (en) | 1982-01-29 |
Family
ID=14086473
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9358980A Pending JPS5718165A (en) | 1980-07-09 | 1980-07-09 | Television synchronizing signal separation system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5718165A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6276869A (en) * | 1985-09-30 | 1987-04-08 | Fujitsu Micom Syst Kk | Synchronizing separator circuit |
-
1980
- 1980-07-09 JP JP9358980A patent/JPS5718165A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6276869A (en) * | 1985-09-30 | 1987-04-08 | Fujitsu Micom Syst Kk | Synchronizing separator circuit |
JPH0327144B2 (en) * | 1985-09-30 | 1991-04-15 | Fujitsu Maikon Shisutemuzu Kk |
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