JPS57181224A - Reference voltage setting circuit - Google Patents
Reference voltage setting circuitInfo
- Publication number
- JPS57181224A JPS57181224A JP6031581A JP6031581A JPS57181224A JP S57181224 A JPS57181224 A JP S57181224A JP 6031581 A JP6031581 A JP 6031581A JP 6031581 A JP6031581 A JP 6031581A JP S57181224 A JPS57181224 A JP S57181224A
- Authority
- JP
- Japan
- Prior art keywords
- clock
- output
- down counter
- polarity
- generating circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/50—Analogue/digital converters with intermediate conversion to time interval
- H03M1/56—Input signal compared with linear ramp
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
PURPOSE:To equalize voltages applied to both terminals of a comparator by inputting a clock to an up/down counter on the basis of logical conditions of the polarity of the clock and the output of the comparator. CONSTITUTION:When the polarity of an output clock from a clock generating circuit 3 changes from a low to a high level, a clock from a clock generating circuit 2 is inputted to an up/down counter 4, which is driven once. A D/A converting circuit 5, once receiving the digital output of the up/down counter 4, raises an output voltage, step by step. If the polarity of the output clock of the clock generating circuit 3 changes from the high to the low level before the output voltage of the D/A converting circuit 5 reaches a prescribed level, the input to the up/down counter 4 is inhibited and the driving operation is stopped.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6031581A JPS57181224A (en) | 1981-04-21 | 1981-04-21 | Reference voltage setting circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6031581A JPS57181224A (en) | 1981-04-21 | 1981-04-21 | Reference voltage setting circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57181224A true JPS57181224A (en) | 1982-11-08 |
JPS6253087B2 JPS6253087B2 (en) | 1987-11-09 |
Family
ID=13138613
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6031581A Granted JPS57181224A (en) | 1981-04-21 | 1981-04-21 | Reference voltage setting circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57181224A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6340034U (en) * | 1986-09-01 | 1988-03-15 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5143665A (en) * | 1974-10-11 | 1976-04-14 | Itt | Anarogu deijitaruhenkakuki |
JPS5546637A (en) * | 1978-09-28 | 1980-04-01 | Seiko Epson Corp | Reference voltage circuit |
-
1981
- 1981-04-21 JP JP6031581A patent/JPS57181224A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5143665A (en) * | 1974-10-11 | 1976-04-14 | Itt | Anarogu deijitaruhenkakuki |
JPS5546637A (en) * | 1978-09-28 | 1980-04-01 | Seiko Epson Corp | Reference voltage circuit |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6340034U (en) * | 1986-09-01 | 1988-03-15 |
Also Published As
Publication number | Publication date |
---|---|
JPS6253087B2 (en) | 1987-11-09 |
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