JPS57178416A - Expanding circuit for pulse width - Google Patents
Expanding circuit for pulse widthInfo
- Publication number
- JPS57178416A JPS57178416A JP6370781A JP6370781A JPS57178416A JP S57178416 A JPS57178416 A JP S57178416A JP 6370781 A JP6370781 A JP 6370781A JP 6370781 A JP6370781 A JP 6370781A JP S57178416 A JPS57178416 A JP S57178416A
- Authority
- JP
- Japan
- Prior art keywords
- delay circuit
- pulse width
- outputs
- terminal
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/04—Shaping pulses by increasing duration; by decreasing duration
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Electronic Switches (AREA)
- Pulse Circuits (AREA)
Abstract
PURPOSE:To expand output pulse width without spoiling fail-safe performance in an information system in affirmative mode, by a delay circuit which outputs either value in case of a fault without fail. CONSTITUTION:A delay circuit 3 outputs a ''0'' when a circuit becomes faulty. Now, if an input ''1'' arrives at a terminal 1, one input to OR4 is a ''1'', so a terminal 2 has a ''1'' immediately. The delay circuit 3 outputs a ''1'' some time later. Even after the output of the delay circuit 3 changes from the ''1'' to the ''0'', it continues for a delay time as the ''1'', so the width of an output pulse appearing at the terminal 2 is the delay time longer than input pulse width. If the delay circuit 3 becomes faulty, the output of the delay circuit 3 is the ''0'' continuously, so there is no possibility that the output pulse width increases.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6370781A JPS57178416A (en) | 1981-04-27 | 1981-04-27 | Expanding circuit for pulse width |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6370781A JPS57178416A (en) | 1981-04-27 | 1981-04-27 | Expanding circuit for pulse width |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57178416A true JPS57178416A (en) | 1982-11-02 |
Family
ID=13237109
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6370781A Pending JPS57178416A (en) | 1981-04-27 | 1981-04-27 | Expanding circuit for pulse width |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57178416A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61177019A (en) * | 1985-01-31 | 1986-08-08 | Matsushita Electric Ind Co Ltd | Pulse stretch circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5516501A (en) * | 1978-06-14 | 1980-02-05 | Nippon Signal Co Ltd:The | Fail-safe logic circuit |
-
1981
- 1981-04-27 JP JP6370781A patent/JPS57178416A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5516501A (en) * | 1978-06-14 | 1980-02-05 | Nippon Signal Co Ltd:The | Fail-safe logic circuit |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61177019A (en) * | 1985-01-31 | 1986-08-08 | Matsushita Electric Ind Co Ltd | Pulse stretch circuit |
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