JPS57168303A - Programming device - Google Patents

Programming device

Info

Publication number
JPS57168303A
JPS57168303A JP56051826A JP5182681A JPS57168303A JP S57168303 A JPS57168303 A JP S57168303A JP 56051826 A JP56051826 A JP 56051826A JP 5182681 A JP5182681 A JP 5182681A JP S57168303 A JPS57168303 A JP S57168303A
Authority
JP
Japan
Prior art keywords
memory
programming device
speed
crt17
program
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56051826A
Other languages
Japanese (ja)
Inventor
Yukio Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56051826A priority Critical patent/JPS57168303A/en
Publication of JPS57168303A publication Critical patent/JPS57168303A/en
Pending legal-status Critical Current

Links

Landscapes

  • Control By Computers (AREA)
  • Programmable Controllers (AREA)
  • Testing And Monitoring For Control Systems (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To obtain a programming device having high screen response without using a high-speed CPU, by using the idle time of the CPU of a programming device and previously converting the program of a plant controller into a CRT display pattern. CONSTITUTION:A CPU13 of a programming device 3 stores all contents of a memory 5 of a plant controller 2 to a memory B11 of the device 3 via a transmission line 19 when an operator gives a transfer request through a keyboard 15. Then the CPU13 reads successively the program stored in the memory B11 in the idle time of other process and produces a display screen pattern for a CRT17 to store it in a memory C12. Thereafter, a designated program screen pattern is extracted out of the memory C12 and displayed on the CRT17 via a CRT interface 16. In such way, the device 3 having high screen response is obtained without using a high-speed transmission line 19 and a high-speed CPU4.
JP56051826A 1981-04-08 1981-04-08 Programming device Pending JPS57168303A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56051826A JPS57168303A (en) 1981-04-08 1981-04-08 Programming device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56051826A JPS57168303A (en) 1981-04-08 1981-04-08 Programming device

Publications (1)

Publication Number Publication Date
JPS57168303A true JPS57168303A (en) 1982-10-16

Family

ID=12897684

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56051826A Pending JPS57168303A (en) 1981-04-08 1981-04-08 Programming device

Country Status (1)

Country Link
JP (1) JPS57168303A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6063612A (en) * 1983-09-19 1985-04-12 Hitachi Ltd Control execution process monitor system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6063612A (en) * 1983-09-19 1985-04-12 Hitachi Ltd Control execution process monitor system

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