JPS57166644A - Data converting circuit - Google Patents

Data converting circuit

Info

Publication number
JPS57166644A
JPS57166644A JP5347281A JP5347281A JPS57166644A JP S57166644 A JPS57166644 A JP S57166644A JP 5347281 A JP5347281 A JP 5347281A JP 5347281 A JP5347281 A JP 5347281A JP S57166644 A JPS57166644 A JP S57166644A
Authority
JP
Japan
Prior art keywords
data
rom
bit
line
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5347281A
Other languages
Japanese (ja)
Inventor
Yoshiharu Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP5347281A priority Critical patent/JPS57166644A/en
Publication of JPS57166644A publication Critical patent/JPS57166644A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

PURPOSE:To simplify hardware and to respond to the increment of data length by storing previously an output data corresponding to its input condition in addresses of an ROM and inputting the previous data, a bit position data and a new bit data to the ROM. CONSTITUTION:A data of a 8-bit input line is outputted from an input data latch circuit 1 by a latch signal of a latch signal input line 6 and applied to an ROM 11. In order to convert the data of the n-th (0<=n<=7) bit, binary (n) is inputted to a bit selecting line 7 and a data (''H'' or ''L'') to be converted is inputted to a new data line 8. Output data corresponding to these address inputs have been previously stored in the ROM 11, a data corresponding to 8 bits is outputted from an ROM 8 and sent to an output data latch circuit 2. By inputting a succeeding latch signal to the circuit 2, the 8 bits of the new data can be fetched on an output line 9 of the circuit 2.
JP5347281A 1981-04-07 1981-04-07 Data converting circuit Pending JPS57166644A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5347281A JPS57166644A (en) 1981-04-07 1981-04-07 Data converting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5347281A JPS57166644A (en) 1981-04-07 1981-04-07 Data converting circuit

Publications (1)

Publication Number Publication Date
JPS57166644A true JPS57166644A (en) 1982-10-14

Family

ID=12943789

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5347281A Pending JPS57166644A (en) 1981-04-07 1981-04-07 Data converting circuit

Country Status (1)

Country Link
JP (1) JPS57166644A (en)

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