JPS57162519A - Converter of automatic gain control data - Google Patents

Converter of automatic gain control data

Info

Publication number
JPS57162519A
JPS57162519A JP4747881A JP4747881A JPS57162519A JP S57162519 A JPS57162519 A JP S57162519A JP 4747881 A JP4747881 A JP 4747881A JP 4747881 A JP4747881 A JP 4747881A JP S57162519 A JPS57162519 A JP S57162519A
Authority
JP
Japan
Prior art keywords
converter
gain
output
amplifier
bits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4747881A
Other languages
Japanese (ja)
Inventor
Masanori Okada
Makoto Usui
Takeo Fujimoto
Takashi Muratani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4747881A priority Critical patent/JPS57162519A/en
Publication of JPS57162519A publication Critical patent/JPS57162519A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/18Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Control By Computers (AREA)
  • Analogue/Digital Conversion (AREA)
  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To increase the resolution to an input signal of a low level, by controlling the gain of an amplifier via a microprocessor so as to ensure a proper level for the digital quantty in case the output of the amplifier is digitized. CONSTITUTION:At first the gain of a variable gain amplifier is set at 1-fold value. An input signal is amplified and supplied to an A/D converter 5 to be digitized. If at first the output of the converter 5 is set at such value that can be showed by the lower 7 bits among the available 12 bit widths, a microprocessor control part 3 transmits a control signal so as to apply the gain to increase the output of the converter 5 by 5 bits, i.e., the 32-fold gain to the amplifier 4. In such way, the number of output bits of the converter 5 is utilized to the full at all times to set the resolution at the maximum level according to the input value.
JP4747881A 1981-03-31 1981-03-31 Converter of automatic gain control data Pending JPS57162519A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4747881A JPS57162519A (en) 1981-03-31 1981-03-31 Converter of automatic gain control data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4747881A JPS57162519A (en) 1981-03-31 1981-03-31 Converter of automatic gain control data

Publications (1)

Publication Number Publication Date
JPS57162519A true JPS57162519A (en) 1982-10-06

Family

ID=12776241

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4747881A Pending JPS57162519A (en) 1981-03-31 1981-03-31 Converter of automatic gain control data

Country Status (1)

Country Link
JP (1) JPS57162519A (en)

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