JPS57158090A - Ep rom device - Google Patents

Ep rom device

Info

Publication number
JPS57158090A
JPS57158090A JP4031581A JP4031581A JPS57158090A JP S57158090 A JPS57158090 A JP S57158090A JP 4031581 A JP4031581 A JP 4031581A JP 4031581 A JP4031581 A JP 4031581A JP S57158090 A JPS57158090 A JP S57158090A
Authority
JP
Japan
Prior art keywords
volts
high voltage
dcr1
signal
turned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4031581A
Other languages
Japanese (ja)
Inventor
Jun Sugiura
Kazuhiro Komori
Minoru Fukuda
Shigeru Yamatani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4031581A priority Critical patent/JPS57158090A/en
Publication of JPS57158090A publication Critical patent/JPS57158090A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/18—Auxiliary circuits, e.g. for writing into memory

Abstract

PURPOSE:To form a word line selection level at the time of verifying operation by using writing high voltage to supply high voltage required when a field effect transistor (FET) or the like is turned on. CONSTITUTION:In verifying operation, high voltage, 25 volts for example, is applied to a writing high voltage terminal VPP. When all internal address signals a1-a8 are in low level, a decode signal dcr1 from an address decoding part DCR1 is made high voltage of about 7 volts and the signal dcr1 is turned to the low level. The source potential of a power transistor (TR) Q1 is fixed on about 5 volts. A decode signal dcr3 is turned to the high level of about 5 volts when the signal dcr1 and the address signals a6-a8 are in low level. When the gate voltage of a transmission gate TR Q7 is in the high level of about 7 volts, the signal dcr3 of about 5 volts is transmitted to a word line W1.
JP4031581A 1981-03-23 1981-03-23 Ep rom device Pending JPS57158090A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4031581A JPS57158090A (en) 1981-03-23 1981-03-23 Ep rom device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4031581A JPS57158090A (en) 1981-03-23 1981-03-23 Ep rom device

Publications (1)

Publication Number Publication Date
JPS57158090A true JPS57158090A (en) 1982-09-29

Family

ID=12577176

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4031581A Pending JPS57158090A (en) 1981-03-23 1981-03-23 Ep rom device

Country Status (1)

Country Link
JP (1) JPS57158090A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4758748A (en) * 1986-03-10 1988-07-19 Fujitsu Limited Sense amplifier for programmable read only memory

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4758748A (en) * 1986-03-10 1988-07-19 Fujitsu Limited Sense amplifier for programmable read only memory

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