JPS6452285A - Decoder circuit - Google Patents
Decoder circuitInfo
- Publication number
- JPS6452285A JPS6452285A JP62208597A JP20859787A JPS6452285A JP S6452285 A JPS6452285 A JP S6452285A JP 62208597 A JP62208597 A JP 62208597A JP 20859787 A JP20859787 A JP 20859787A JP S6452285 A JPS6452285 A JP S6452285A
- Authority
- JP
- Japan
- Prior art keywords
- word line
- transistors
- driver
- mosfet
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Static Random-Access Memory (AREA)
- Dram (AREA)
Abstract
PURPOSE:To reduce the number of transistors and to attain a large capacity by constituting a NAND circuit of a deprecation type voltage supplying load MOSFET and an enhancement type MOSFET for a driver. CONSTITUTION:The deprecation type load MOSFETQ0 is constantly turned on and at the time of impressing all 'H' levels to address signals Ax1-Ax5, all the enhancement type MOSFETQ1a-Q5a for the driver are turned on. A decode output node 10 goes to 'L' level to select a word line W1 through a C-MOS inverter constituted of the transistors P6, Q6. At the time of impressing even one 'L' level of address inputs, the word line W1 is not selected. Other word line selecting decoders 11, 12 are constituted by replacing the MOSFET for the driver by a P channel type according to the address of the word line. Thereby, the number of the transistors is reduced to attain the large capacity.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62208597A JPS6452285A (en) | 1987-08-21 | 1987-08-21 | Decoder circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62208597A JPS6452285A (en) | 1987-08-21 | 1987-08-21 | Decoder circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6452285A true JPS6452285A (en) | 1989-02-28 |
Family
ID=16558838
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62208597A Pending JPS6452285A (en) | 1987-08-21 | 1987-08-21 | Decoder circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6452285A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04170223A (en) * | 1990-11-02 | 1992-06-17 | Nec Ic Microcomput Syst Ltd | Semiconductor integrated circuit |
| US5323357A (en) * | 1991-03-26 | 1994-06-21 | Nec Corporation | Noise-free semiconductor memory device capable of disconnecting word line decoder from ground terminal |
| JP2008166114A (en) * | 2006-12-28 | 2008-07-17 | Matsushita Electric Ind Co Ltd | Surface mounting type current fuse, and its manufacturing method |
| JP2008198562A (en) * | 2007-02-15 | 2008-08-28 | Matsushita Electric Ind Co Ltd | Surface mounting type current fuse and its manufacturing method |
| US8368502B2 (en) | 2006-03-16 | 2013-02-05 | Panasonic Corporation | Surface-mount current fuse |
-
1987
- 1987-08-21 JP JP62208597A patent/JPS6452285A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04170223A (en) * | 1990-11-02 | 1992-06-17 | Nec Ic Microcomput Syst Ltd | Semiconductor integrated circuit |
| US5323357A (en) * | 1991-03-26 | 1994-06-21 | Nec Corporation | Noise-free semiconductor memory device capable of disconnecting word line decoder from ground terminal |
| US8368502B2 (en) | 2006-03-16 | 2013-02-05 | Panasonic Corporation | Surface-mount current fuse |
| JP2008166114A (en) * | 2006-12-28 | 2008-07-17 | Matsushita Electric Ind Co Ltd | Surface mounting type current fuse, and its manufacturing method |
| JP2008198562A (en) * | 2007-02-15 | 2008-08-28 | Matsushita Electric Ind Co Ltd | Surface mounting type current fuse and its manufacturing method |
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