JPS57155843A - Noise reduction circuit - Google Patents
Noise reduction circuitInfo
- Publication number
- JPS57155843A JPS57155843A JP4203381A JP4203381A JPS57155843A JP S57155843 A JPS57155843 A JP S57155843A JP 4203381 A JP4203381 A JP 4203381A JP 4203381 A JP4203381 A JP 4203381A JP S57155843 A JPS57155843 A JP S57155843A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- output signal
- circuit
- output
- gain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G7/00—Volume compression or expansion in amplifiers
- H03G7/002—Volume compression or expansion in amplifiers in untuned or low-frequency amplifiers, e.g. audio amplifiers
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Networks Using Active Elements (AREA)
- Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
Abstract
PURPOSE:To enable a remarkable noise reduction, by performing a signal level adjustment accompanied with addition and subtraction at an input side and an output side of a signal processing circuit. CONSTITUTION:An input signal Vi and an output signal of a voltage control type variable gain amplifier 12 inputting the input signal Vi are applied to an adder 10, an output signal Va is applied to a signal processing circuit 16, and the gain of a voltage control type variable gain ampifier 18 with a control signal in response to the input signal Vi from a control signal generating circuit 14 is controlled. An output signal Vb from the signal processing circuit 16 and a signal -Vc inverting the phase of an output signal Vc of the amplifier 18 having the gain of =1 to which the output signal Vb is inputted, are added to an adder 26 to obtain an output signal Vo. In this case, based on an output signal Vs from a nonsignal detection circuit 22 and an output signal from the circuit 14, an output signal of the circuit 14 is taken as a control signal VG as it is with a control signal generating circuit 20 when Vs=0, and when Vs=1, the gain of the amplifier 18 is taken as the unity by the control signal VG.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4203381A JPS57155843A (en) | 1981-03-23 | 1981-03-23 | Noise reduction circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4203381A JPS57155843A (en) | 1981-03-23 | 1981-03-23 | Noise reduction circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57155843A true JPS57155843A (en) | 1982-09-27 |
Family
ID=12624845
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4203381A Pending JPS57155843A (en) | 1981-03-23 | 1981-03-23 | Noise reduction circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57155843A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63174496A (en) * | 1987-01-14 | 1988-07-18 | Mitsubishi Electric Corp | Delaying device |
JPH073627U (en) * | 1992-07-07 | 1995-01-20 | 幸雄 中濱 | Electric lift for medical beds |
-
1981
- 1981-03-23 JP JP4203381A patent/JPS57155843A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63174496A (en) * | 1987-01-14 | 1988-07-18 | Mitsubishi Electric Corp | Delaying device |
JPH073627U (en) * | 1992-07-07 | 1995-01-20 | 幸雄 中濱 | Electric lift for medical beds |
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