JPS57155605A - Programmable controller - Google Patents
Programmable controllerInfo
- Publication number
- JPS57155605A JPS57155605A JP4123381A JP4123381A JPS57155605A JP S57155605 A JPS57155605 A JP S57155605A JP 4123381 A JP4123381 A JP 4123381A JP 4123381 A JP4123381 A JP 4123381A JP S57155605 A JPS57155605 A JP S57155605A
- Authority
- JP
- Japan
- Prior art keywords
- control
- program
- power supply
- storage device
- ffd3a
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/12—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using record carriers
- G05B19/16—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using record carriers using magnetic record carriers
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Programmable Controllers (AREA)
Abstract
PURPOSE:To increase the degree of freedom for the control of the process control or the count control of a plant, by feeding a desired program to a volatile main storage device from a secondary storage device when the power supply is applied and then giving CPU control. CONSTITUTION:A CPU1 performs a prescribed operation based on a program stored in a main storage device 2 and then gives the control to the process via an input/output device 5. A floppy disk device 3 consists of a floppy disk (FDD) 3a and a power supply switch 3b. The FDD3a stores a program which runs in the normal operation mode, i.e., a program to be stored in the device 2. The contents of the device 2 are erased when the power supply of a programmable controller is turned off or interrupted. When the power supply is applied or recovered, the program of the FFD3a is transferred to the device 2. After this, the switch 3b is turned off. The CPU1 performs the control based on the program of the device 2. Thus the degree of freedom is increased for the control with an exchange of the FFD3a.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4123381A JPS57155605A (en) | 1981-03-20 | 1981-03-20 | Programmable controller |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4123381A JPS57155605A (en) | 1981-03-20 | 1981-03-20 | Programmable controller |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57155605A true JPS57155605A (en) | 1982-09-25 |
Family
ID=12602688
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4123381A Pending JPS57155605A (en) | 1981-03-20 | 1981-03-20 | Programmable controller |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57155605A (en) |
-
1981
- 1981-03-20 JP JP4123381A patent/JPS57155605A/en active Pending
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