JPS57142064A - Network test system - Google Patents
Network test systemInfo
- Publication number
- JPS57142064A JPS57142064A JP2804981A JP2804981A JPS57142064A JP S57142064 A JPS57142064 A JP S57142064A JP 2804981 A JP2804981 A JP 2804981A JP 2804981 A JP2804981 A JP 2804981A JP S57142064 A JPS57142064 A JP S57142064A
- Authority
- JP
- Japan
- Prior art keywords
- folding
- internal time
- slot
- terminal device
- ptu
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M3/00—Automatic or semi-automatic exchanges
- H04M3/22—Arrangements for supervision, monitoring or testing
- H04M3/24—Arrangements for supervision, monitoring or testing with provision for checking the normal operation
- H04M3/244—Arrangements for supervision, monitoring or testing with provision for checking the normal operation for multiplex systems
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Monitoring And Testing Of Exchanges (AREA)
Abstract
PURPOSE:To achieve test of networks only with the change in an internal time slot, by using a pseudo terminal device in which the phase difference can be changed. CONSTITUTION:A data on an external slot converted at a demultiplexer DMPX is transmitted to a multiplexer MPX via a shift register SR1 of a pseudo terminal device PTU. In folding transfer through an opened gate G1, the internal time slot number of the DMPX and that converted at the MPX are the same, and in folding transfer with an opened gate G2, they are different. A flip-flop FF latches a data of the internal slot from a selector SEL2 with a folding instruction given via a signal reception distributor SRD from a central control unit CC and folds it via SELs 3 and 1. Thus, the test for network can be made by using the difference between the internal time slots from folding with the PTU and with the FF.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2804981A JPS57142064A (en) | 1981-02-27 | 1981-02-27 | Network test system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2804981A JPS57142064A (en) | 1981-02-27 | 1981-02-27 | Network test system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57142064A true JPS57142064A (en) | 1982-09-02 |
Family
ID=12237892
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2804981A Pending JPS57142064A (en) | 1981-02-27 | 1981-02-27 | Network test system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57142064A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0171803A2 (en) * | 1984-08-15 | 1986-02-19 | Fujitsu Limited | Time division exchange for carrying out a loop-back test |
JPS61146052A (en) * | 1984-12-20 | 1986-07-03 | Fujitsu Ltd | Network transmission line checking system |
JPS61251397A (en) * | 1985-04-30 | 1986-11-08 | Fujitsu Ltd | Method for testing exchange |
-
1981
- 1981-02-27 JP JP2804981A patent/JPS57142064A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0171803A2 (en) * | 1984-08-15 | 1986-02-19 | Fujitsu Limited | Time division exchange for carrying out a loop-back test |
JPS61146052A (en) * | 1984-12-20 | 1986-07-03 | Fujitsu Ltd | Network transmission line checking system |
JPS61251397A (en) * | 1985-04-30 | 1986-11-08 | Fujitsu Ltd | Method for testing exchange |
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