JPS57142048A - Code error rate display device - Google Patents

Code error rate display device

Info

Publication number
JPS57142048A
JPS57142048A JP2674081A JP2674081A JPS57142048A JP S57142048 A JPS57142048 A JP S57142048A JP 2674081 A JP2674081 A JP 2674081A JP 2674081 A JP2674081 A JP 2674081A JP S57142048 A JPS57142048 A JP S57142048A
Authority
JP
Japan
Prior art keywords
circuit
code
error
error rate
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2674081A
Other languages
Japanese (ja)
Other versions
JPS637696B2 (en
Inventor
Shinichi Sugano
Yoichi Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Anritsu Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Anritsu Corp
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Anritsu Corp, Nippon Telegraph and Telephone Corp filed Critical Anritsu Corp
Priority to JP2674081A priority Critical patent/JPS57142048A/en
Publication of JPS57142048A publication Critical patent/JPS57142048A/en
Publication of JPS637696B2 publication Critical patent/JPS637696B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/24—Testing correct operation

Abstract

PURPOSE:To achieve a display in accordance with the generating state of error, by displaying a value corresponding to a code error rate from the clock pulse number when error code pulses reach a prescribed amount, in the display of the code error rate of a pulse code transmission system such as a PCM communication. CONSTITUTION:An error code pulse applied to an input 4 is counted at a counter circuit 9, and this measuring time is obtained from a counting value of a counter circuit 10 counting clock pulses applied to an input 2. When a counting value of the error code pulse of the circuit 9 is constant, e.g., 100, the count of the circuit 10 is stopped and the counting value is inputted to an error rate selection circuit 11. The circuit 11 consists of read only memories and the circuit stores the ratio of the error code pulse number to the clock pulse number, and when the corresponding storage content is selected, it is stored in a storage circuit 5. On the other hand, the number of digits of the count value of the circuit 10 is detected at a detection circuit 7 and stored in a storage circuit 8. The storage content of the storage circuits 5 and 8 is displayed at a display circuit 6.
JP2674081A 1981-02-27 1981-02-27 Code error rate display device Granted JPS57142048A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2674081A JPS57142048A (en) 1981-02-27 1981-02-27 Code error rate display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2674081A JPS57142048A (en) 1981-02-27 1981-02-27 Code error rate display device

Publications (2)

Publication Number Publication Date
JPS57142048A true JPS57142048A (en) 1982-09-02
JPS637696B2 JPS637696B2 (en) 1988-02-18

Family

ID=12201691

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2674081A Granted JPS57142048A (en) 1981-02-27 1981-02-27 Code error rate display device

Country Status (1)

Country Link
JP (1) JPS57142048A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6121639A (en) * 1984-07-09 1986-01-30 Fujitsu Ltd Bit error rate calculating method
JPS61137441A (en) * 1984-12-07 1986-06-25 Nec Corp Pulse counting device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6121639A (en) * 1984-07-09 1986-01-30 Fujitsu Ltd Bit error rate calculating method
JPS61137441A (en) * 1984-12-07 1986-06-25 Nec Corp Pulse counting device

Also Published As

Publication number Publication date
JPS637696B2 (en) 1988-02-18

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