JPS5713839A - Transmission system - Google Patents

Transmission system

Info

Publication number
JPS5713839A
JPS5713839A JP8812580A JP8812580A JPS5713839A JP S5713839 A JPS5713839 A JP S5713839A JP 8812580 A JP8812580 A JP 8812580A JP 8812580 A JP8812580 A JP 8812580A JP S5713839 A JPS5713839 A JP S5713839A
Authority
JP
Japan
Prior art keywords
signal
frequency
oscillator
output
synchronizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8812580A
Other languages
Japanese (ja)
Inventor
Toshio Tatsuzawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP8812580A priority Critical patent/JPS5713839A/en
Publication of JPS5713839A publication Critical patent/JPS5713839A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying

Abstract

PURPOSE:To perform stable transmission and reception by obtaining a synchronizing signal, synchronizing with a received data signal, from the received signal regardless of the state of a transmitted data signal. CONSTITUTION:When a switch 3 is controlled by a data signal, the output of the switch 3 is made into an FSK signal, frequency-modulated into a frequency (n) or (m) times the oscillation frequency of a quartz oscillator 4 synchronizing with a data pulse signal, and then sent to a reception side. The received FSK signal is demodulated by a frequency discriminator 10 into data signal pulses, which are outputted 12 via a buffer amplifier 11. Part of the FSK signal is brought under switch control by the output of the discriminator 10, so the output frequency of a switch 15 is held equal to that of the oscillator 4. Consequently, the output frequency of a voltage-controlled oscillator 17 is equalized to that of the oscillator 4 and the output of the oscillator 17 is outputted from a terminal 20 synchronizing with a data signal outputted from a buffer amplifier 19 to a terminal 12.
JP8812580A 1980-06-27 1980-06-27 Transmission system Pending JPS5713839A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8812580A JPS5713839A (en) 1980-06-27 1980-06-27 Transmission system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8812580A JPS5713839A (en) 1980-06-27 1980-06-27 Transmission system

Publications (1)

Publication Number Publication Date
JPS5713839A true JPS5713839A (en) 1982-01-23

Family

ID=13934182

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8812580A Pending JPS5713839A (en) 1980-06-27 1980-06-27 Transmission system

Country Status (1)

Country Link
JP (1) JPS5713839A (en)

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