JPS57132445U - - Google Patents
Info
- Publication number
- JPS57132445U JPS57132445U JP1919881U JP1919881U JPS57132445U JP S57132445 U JPS57132445 U JP S57132445U JP 1919881 U JP1919881 U JP 1919881U JP 1919881 U JP1919881 U JP 1919881U JP S57132445 U JPS57132445 U JP S57132445U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
- Die Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1981019198U JPH0222987Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1981-02-13 | 1981-02-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1981019198U JPH0222987Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1981-02-13 | 1981-02-13 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57132445U true JPS57132445U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1982-08-18 |
| JPH0222987Y2 JPH0222987Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1990-06-21 |
Family
ID=29817142
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1981019198U Expired JPH0222987Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1981-02-13 | 1981-02-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0222987Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53116082U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1977-02-24 | 1978-09-14 | ||
| JPS5512747A (en) * | 1978-07-12 | 1980-01-29 | Matsushita Electronics Corp | Lead frame detecting device |
| JPS5548140A (en) * | 1978-10-03 | 1980-04-05 | Oki Electric Ind Co Ltd | Double feed senser of paper |
| JPS55163856A (en) * | 1979-06-06 | 1980-12-20 | Toshiba Corp | Apparatus for positioning semiconductor device enclosure |
-
1981
- 1981-02-13 JP JP1981019198U patent/JPH0222987Y2/ja not_active Expired
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53116082U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1977-02-24 | 1978-09-14 | ||
| JPS5512747A (en) * | 1978-07-12 | 1980-01-29 | Matsushita Electronics Corp | Lead frame detecting device |
| JPS5548140A (en) * | 1978-10-03 | 1980-04-05 | Oki Electric Ind Co Ltd | Double feed senser of paper |
| JPS55163856A (en) * | 1979-06-06 | 1980-12-20 | Toshiba Corp | Apparatus for positioning semiconductor device enclosure |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0222987Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1990-06-21 |