JPS57132427A - Superconductive logical gate - Google Patents

Superconductive logical gate

Info

Publication number
JPS57132427A
JPS57132427A JP56017678A JP1767881A JPS57132427A JP S57132427 A JPS57132427 A JP S57132427A JP 56017678 A JP56017678 A JP 56017678A JP 1767881 A JP1767881 A JP 1767881A JP S57132427 A JPS57132427 A JP S57132427A
Authority
JP
Japan
Prior art keywords
resistance
terminal
logical gate
gate
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56017678A
Other languages
Japanese (ja)
Other versions
JPS6157739B2 (en
Inventor
Koji Takaragawa
Akira Ishida
Takashi Okada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP56017678A priority Critical patent/JPS57132427A/en
Priority to US06/269,874 priority patent/US4482821A/en
Priority to GB8117187A priority patent/GB2078046B/en
Priority to NLAANVRAGE8102758,A priority patent/NL188441C/en
Priority to FR8111437A priority patent/FR2484173B1/en
Priority to CA000379407A priority patent/CA1169498A/en
Priority to DE3122986A priority patent/DE3122986C2/en
Publication of JPS57132427A publication Critical patent/JPS57132427A/en
Publication of JPS6157739B2 publication Critical patent/JPS6157739B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/195—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
    • H03K19/1954—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices with injection of the control current
    • H03K19/1956—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices with injection of the control current using an inductorless circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)

Abstract

PURPOSE:To expand an operation area of a superconductive logical gate which has utilized Josephson junction, and to operate it at a high speed, by fetching an output terminal from a part of the circuit and operating it as the logical gate. CONSTITUTION:This gate is provided with input terminals T1, T2, and a series circuit consisting of a Josephson junction J1 and a resistance R1 is provided between the terminal T1 and the terminal T2. Also, a parallel circuit consisting of a Josephson terminal J2 and a resistance R2 is provided between the terminal T2 and ground. Furthermore, a series circuit consisting of a Josephson junction J3 and a resistance R3 is provided between the terminal T1 and ground. Also, a resistance R4 is connected between a connecting point P1 of the resistance R1 and the junction J1, and a connecting point P2 of the resistance R3 and the junction J3. In this way, when an output terminal T3 is provided on a part of the circuit, this gate is operated as a logical gate.
JP56017678A 1980-06-10 1981-02-09 Superconductive logical gate Granted JPS57132427A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP56017678A JPS57132427A (en) 1981-02-09 1981-02-09 Superconductive logical gate
US06/269,874 US4482821A (en) 1980-06-10 1981-06-03 Superconductive logic circuit
GB8117187A GB2078046B (en) 1980-06-10 1981-06-04 Superconductive logic circuit
NLAANVRAGE8102758,A NL188441C (en) 1980-06-10 1981-06-09 SUPER CONDUCTIVE LOGIC CIRCUIT.
FR8111437A FR2484173B1 (en) 1980-06-10 1981-06-10 SUPERCONDUCTIVE LOGIC CIRCUIT
CA000379407A CA1169498A (en) 1980-06-10 1981-06-10 Superconductive logic circuit
DE3122986A DE3122986C2 (en) 1980-06-10 1981-06-10 Injection current-controlled basic circuit with Josephson elements

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56017678A JPS57132427A (en) 1981-02-09 1981-02-09 Superconductive logical gate

Publications (2)

Publication Number Publication Date
JPS57132427A true JPS57132427A (en) 1982-08-16
JPS6157739B2 JPS6157739B2 (en) 1986-12-08

Family

ID=11950505

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56017678A Granted JPS57132427A (en) 1980-06-10 1981-02-09 Superconductive logical gate

Country Status (1)

Country Link
JP (1) JPS57132427A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6252036B1 (en) * 1997-04-18 2001-06-26 Teijin Limited Process for producing polycarbonate resin

Also Published As

Publication number Publication date
JPS6157739B2 (en) 1986-12-08

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