JPS57123771A - Ghost reduction device - Google Patents

Ghost reduction device

Info

Publication number
JPS57123771A
JPS57123771A JP56202241A JP20224181A JPS57123771A JP S57123771 A JPS57123771 A JP S57123771A JP 56202241 A JP56202241 A JP 56202241A JP 20224181 A JP20224181 A JP 20224181A JP S57123771 A JPS57123771 A JP S57123771A
Authority
JP
Japan
Prior art keywords
signal
circuit
ghost
terminal
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56202241A
Other languages
Japanese (ja)
Inventor
Akira Usui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP56202241A priority Critical patent/JPS57123771A/en
Publication of JPS57123771A publication Critical patent/JPS57123771A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/14Picture signal circuitry for video frequency region
    • H04N5/21Circuitry for suppressing or minimising disturbance, e.g. moiré or halo
    • H04N5/211Ghost signal cancellation

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)

Abstract

PURPOSE:To facilitate ghost adjustment by providing a circuit which clips a signal projecting from the bottom level of a synchronizing signal in the output of an adder, and clips an unadjusted correction signal generated when ghost is adjusted, and prevents the disorder of synchronism. CONSTITUTION:A video signal inputted from an input terminal 1 and a signal, which is removed from ghost, from an addition circuit 34 are added by an addition circuit 7, whose output is inputted partially to a delay line 12 through an inverting amplifier constituting a distributing circuit while the remainder is applied to a transistor (TR) 37 connected to an output terminal 38. A signal after time adjustment through the delay line is applied to a polarity and amplitude adjusting circuit 17, and the other signal distributed by the TR13 is applied to a polarity and amplitude adjusting circuit 27. The outputs of both the circuits 17 and 27 are applied to an adding circuit 24 to remove a ghost signal, thereby outputting the resulting signal from a terminal 38. The output signal from the terminal 38 is applied to a clipping circuit composed of TRs 41 and 45, diodes 40 and 44, etc., and an unadjusted correction signal is clipped to facilitate the adjustment of ghost.
JP56202241A 1981-12-14 1981-12-14 Ghost reduction device Pending JPS57123771A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56202241A JPS57123771A (en) 1981-12-14 1981-12-14 Ghost reduction device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56202241A JPS57123771A (en) 1981-12-14 1981-12-14 Ghost reduction device

Publications (1)

Publication Number Publication Date
JPS57123771A true JPS57123771A (en) 1982-08-02

Family

ID=16454286

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56202241A Pending JPS57123771A (en) 1981-12-14 1981-12-14 Ghost reduction device

Country Status (1)

Country Link
JP (1) JPS57123771A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5179510A (en) * 1975-01-06 1976-07-10 Hitachi Ltd

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5179510A (en) * 1975-01-06 1976-07-10 Hitachi Ltd

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