JPS5712295B2 - - Google Patents
Info
- Publication number
- JPS5712295B2 JPS5712295B2 JP9277375A JP9277375A JPS5712295B2 JP S5712295 B2 JPS5712295 B2 JP S5712295B2 JP 9277375 A JP9277375 A JP 9277375A JP 9277375 A JP9277375 A JP 9277375A JP S5712295 B2 JPS5712295 B2 JP S5712295B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92142—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92144—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50092773A JPS5216166A (en) | 1975-07-29 | 1975-07-29 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50092773A JPS5216166A (en) | 1975-07-29 | 1975-07-29 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5216166A JPS5216166A (en) | 1977-02-07 |
JPS5712295B2 true JPS5712295B2 (no) | 1982-03-10 |
Family
ID=14063727
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP50092773A Granted JPS5216166A (en) | 1975-07-29 | 1975-07-29 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5216166A (no) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59180798U (ja) * | 1983-05-18 | 1984-12-03 | 岡山日章プラント株式会社 | スクリ−ンかす移送孔 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53139972A (en) * | 1977-05-13 | 1978-12-06 | Matsushita Electric Ind Co Ltd | Production of semiconductor device |
JPS5630782A (en) * | 1979-08-20 | 1981-03-27 | Matsushita Electric Ind Co Ltd | Electronic circuit device and method of manufacturing same |
JP3280394B2 (ja) * | 1990-04-05 | 2002-05-13 | ロックヒード マーティン コーポレーション | 電子装置 |
-
1975
- 1975-07-29 JP JP50092773A patent/JPS5216166A/ja active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59180798U (ja) * | 1983-05-18 | 1984-12-03 | 岡山日章プラント株式会社 | スクリ−ンかす移送孔 |
Also Published As
Publication number | Publication date |
---|---|
JPS5216166A (en) | 1977-02-07 |