JPS57116479A - Image processing circuit - Google Patents
Image processing circuitInfo
- Publication number
- JPS57116479A JPS57116479A JP56002836A JP283681A JPS57116479A JP S57116479 A JPS57116479 A JP S57116479A JP 56002836 A JP56002836 A JP 56002836A JP 283681 A JP283681 A JP 283681A JP S57116479 A JPS57116479 A JP S57116479A
- Authority
- JP
- Japan
- Prior art keywords
- image
- frequency component
- counter
- threshold value
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/40—Picture signal circuits
- H04N1/409—Edge or detail enhancement; Noise or error suppression
Abstract
PURPOSE:To obtain an image of high quality by preventing the generation of the moire of a mesh-point image and a dithered image by extracting the high-frequency component of an image signal and by inputting only a clock for picture- element transfer to a counter for addressing when the high-frequency component exceeds some threshold value. CONSTITUTION:An image density signal S(i,j) from an image sensor 1 is inputted to a comparator 3 and a filter 10, which extracts a high-frequency component from the image signal. A discriminating circuit 11 compares the value of this extracted high-frequency component with some threshold value and, when the high-frequency component exceeds some threshold value, puts a random access generating circuit 12 in operation to generate random pulses. The random pulses are delayed by a delay circuit 13 and ORed with clock pulses by an OR circuit 14, whose outputs are inputted to a counter 4. Then, the counter 4 reads image information from a dither matrix 5 to a DA converter 6, and the comparator 3 outputs image signals (oi) and (j) to prevent the generation of a moire.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56002836A JPS57116479A (en) | 1981-01-12 | 1981-01-12 | Image processing circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56002836A JPS57116479A (en) | 1981-01-12 | 1981-01-12 | Image processing circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57116479A true JPS57116479A (en) | 1982-07-20 |
Family
ID=11540494
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56002836A Pending JPS57116479A (en) | 1981-01-12 | 1981-01-12 | Image processing circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57116479A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06195471A (en) * | 1985-06-19 | 1994-07-15 | Pixar | Method for point sampling of image data, method for formation of video image frame and apparatus for display of image |
-
1981
- 1981-01-12 JP JP56002836A patent/JPS57116479A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06195471A (en) * | 1985-06-19 | 1994-07-15 | Pixar | Method for point sampling of image data, method for formation of video image frame and apparatus for display of image |
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