JPS57113629A - Circuit for removing noise of semiconductor device - Google Patents

Circuit for removing noise of semiconductor device

Info

Publication number
JPS57113629A
JPS57113629A JP56146425A JP14642581A JPS57113629A JP S57113629 A JPS57113629 A JP S57113629A JP 56146425 A JP56146425 A JP 56146425A JP 14642581 A JP14642581 A JP 14642581A JP S57113629 A JPS57113629 A JP S57113629A
Authority
JP
Japan
Prior art keywords
circuit
semiconductor device
removing noise
noise
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56146425A
Other languages
English (en)
Other versions
JPH0213861B2 (ja
Inventor
Ii Dabitsudoson Eban
Ei Katopisu Jiyooji
Jiei Rubin Barii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS57113629A publication Critical patent/JPS57113629A/ja
Publication of JPH0213861B2 publication Critical patent/JPH0213861B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/462—Regulating voltage or current wherein the variable actually regulated by the final control device is dc as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic
    • G05F1/467—Sources with noise compensation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Logic Circuits (AREA)
  • Noise Elimination (AREA)
  • Dc Digital Transmission (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP56146425A 1980-12-19 1981-09-18 Circuit for removing noise of semiconductor device Granted JPS57113629A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/218,150 US4398106A (en) 1980-12-19 1980-12-19 On-chip Delta-I noise clamping circuit

Publications (2)

Publication Number Publication Date
JPS57113629A true JPS57113629A (en) 1982-07-15
JPH0213861B2 JPH0213861B2 (ja) 1990-04-05

Family

ID=22813963

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56146425A Granted JPS57113629A (en) 1980-12-19 1981-09-18 Circuit for removing noise of semiconductor device

Country Status (4)

Country Link
US (1) US4398106A (ja)
EP (1) EP0054642B1 (ja)
JP (1) JPS57113629A (ja)
DE (1) DE3176585D1 (ja)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5846178B2 (ja) * 1980-12-03 1983-10-14 富士通株式会社 半導体装置
US4508981A (en) * 1982-06-28 1985-04-02 International Business Machines Corporation Driver circuitry for reducing on-chip Delta-I noise
US4481430A (en) * 1982-08-02 1984-11-06 Fairchild Camera & Instrument Corp. Power supply threshold activation circuit
US4516123A (en) * 1982-12-27 1985-05-07 At&T Bell Laboratories Integrated circuit including logic array with distributed ground connections
US4553049A (en) * 1983-10-07 1985-11-12 International Business Machines Corporation Oscillation prevention during testing of integrated circuit logic chips
US4553050A (en) * 1983-12-27 1985-11-12 International Business Machines Corporation Transmission line terminator-decoupling capacitor chip for off-chip driver
US4585958A (en) * 1983-12-30 1986-04-29 At&T Bell Laboratories IC chip with noise suppression circuit
US4613771A (en) * 1984-04-18 1986-09-23 Burroughs Corporation Integrated circuit having three power bases and proportioned parasitic resistive and capacitive coupling to reduce output noise
US4609834A (en) * 1984-12-24 1986-09-02 Burroughs Corporation Integrated logic circuit incorporating a module which generates a control signal that cancels switching noise
US4644265A (en) * 1985-09-03 1987-02-17 International Business Machines Corporation Noise reduction during testing of integrated circuit chips
US4636867A (en) * 1985-10-30 1987-01-13 Rca Corporation Grounding arrangement useful in a display apparatus
JPS62159917A (ja) * 1986-01-08 1987-07-15 Toshiba Corp 集積回路におけるインバ−タ回路
US4970419A (en) * 1987-03-23 1990-11-13 Unisys Corporation Low-noise transmission line termination circuitry
JP2746894B2 (ja) * 1988-01-22 1998-05-06 株式会社東芝 電子機器の電源供給ライン
US4831283A (en) * 1988-05-16 1989-05-16 Bnr Inc. Terminator current driver with short-circuit protection
TW214631B (ja) * 1992-02-25 1993-10-11 American Telephone & Telegraph
US5471397A (en) * 1993-12-15 1995-11-28 International Business Machines Corporation Identifying subsets of noise violators and contributors in package wiring
US5572736A (en) * 1995-03-31 1996-11-05 International Business Machines Corporation Method and apparatus for reducing bus noise and power consumption
TW200501580A (en) * 2003-06-23 2005-01-01 Mitac Technology Corp Offset circuit for constraining electromagnetic interference and operation method thereof
US20080046789A1 (en) * 2006-08-21 2008-02-21 Igor Arsovski Apparatus and method for testing memory devices and circuits in integrated circuits

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5560318A (en) * 1978-10-27 1980-05-07 Matsushita Electric Ind Co Ltd Surge absorbing circuit

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1166255B (de) * 1960-05-20 1964-03-26 Rca Corp Begrenzerschaltung
US3654530A (en) * 1970-06-22 1972-04-04 Ibm Integrated clamping circuit
US3859638A (en) * 1973-05-31 1975-01-07 Intersil Inc Non-volatile memory unit with automatic standby power supply
US3936863A (en) * 1974-09-09 1976-02-03 Rca Corporation Integrated power transistor with ballasting resistance and breakdown protection
US4027177A (en) * 1975-03-05 1977-05-31 Motorola, Inc. Clamping circuit
US4095163A (en) * 1976-06-01 1978-06-13 Control Concepts Corporation Transient voltage suppression circuit
US4323792A (en) * 1978-06-28 1982-04-06 Bergmann Guenther Two terminal circuitry for voltage limitation
US4220876A (en) * 1978-08-17 1980-09-02 Motorola, Inc. Bus terminating and decoupling circuit
EP0013099B1 (en) * 1978-12-23 1982-02-10 Fujitsu Limited Semiconductor integrated circuit device including a reference voltage generator feeding a plurality of loads

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5560318A (en) * 1978-10-27 1980-05-07 Matsushita Electric Ind Co Ltd Surge absorbing circuit

Also Published As

Publication number Publication date
EP0054642A2 (en) 1982-06-30
EP0054642B1 (en) 1987-12-23
DE3176585D1 (en) 1988-02-04
JPH0213861B2 (ja) 1990-04-05
EP0054642A3 (en) 1985-03-13
US4398106A (en) 1983-08-09

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