JPS57113124A - Controlling method for balancing load electric power - Google Patents

Controlling method for balancing load electric power

Info

Publication number
JPS57113124A
JPS57113124A JP18869780A JP18869780A JPS57113124A JP S57113124 A JPS57113124 A JP S57113124A JP 18869780 A JP18869780 A JP 18869780A JP 18869780 A JP18869780 A JP 18869780A JP S57113124 A JPS57113124 A JP S57113124A
Authority
JP
Japan
Prior art keywords
loads
zero
pulse
cross
origin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18869780A
Other languages
Japanese (ja)
Inventor
Tadahiro Eda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP18869780A priority Critical patent/JPS57113124A/en
Publication of JPS57113124A publication Critical patent/JPS57113124A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/084Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters using a control circuit common to several phases of a multi-phase system

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Control Of Voltage And Current In General (AREA)
  • Remote Monitoring And Control Of Power-Distribution Networks (AREA)

Abstract

PURPOSE:To reduce waveform distortion and a peak by avoiding the overlap of the current conduction time of each load as much as possible, by repeatedly turning on and off the same AC power source to at least two loads with different phases. CONSTITUTION:When an AC voltage is applied from one AC power source to loads 1-3, a phase distributor PD supplies an ON origin signal or an OFF origin signal to power controllers PC1-PC3 for the loads. For example, when voltages of the front, intermediate and rear parts of a half wave are applied to the loads 1, 2 and 3 respectively, the PC1 is supplied with a zero-cross pulse as an ON indication signal, and the PC2 is supplied with a pulse having a prescribed time limit while the zero-cross pulse is regarded as an origin; and they are turned off under the phase control of the controllers PC1 and PC2. The controller PC3, on the other hand, turns on through its phase control, and an ON-OFF means SW3 uses a thyristor which turns off automatically at the zero-cross point of an alternating current. For turning-off operation at a point other than the zero-cross point, a transistor switching circuit, etc., is used.
JP18869780A 1980-12-29 1980-12-29 Controlling method for balancing load electric power Pending JPS57113124A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18869780A JPS57113124A (en) 1980-12-29 1980-12-29 Controlling method for balancing load electric power

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18869780A JPS57113124A (en) 1980-12-29 1980-12-29 Controlling method for balancing load electric power

Publications (1)

Publication Number Publication Date
JPS57113124A true JPS57113124A (en) 1982-07-14

Family

ID=16228230

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18869780A Pending JPS57113124A (en) 1980-12-29 1980-12-29 Controlling method for balancing load electric power

Country Status (1)

Country Link
JP (1) JPS57113124A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62288914A (en) * 1986-06-09 1987-12-15 Toshiba Corp Load controller

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62288914A (en) * 1986-06-09 1987-12-15 Toshiba Corp Load controller

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