JPS57111623A - Channel service equalizing system - Google Patents

Channel service equalizing system

Info

Publication number
JPS57111623A
JPS57111623A JP18704980A JP18704980A JPS57111623A JP S57111623 A JPS57111623 A JP S57111623A JP 18704980 A JP18704980 A JP 18704980A JP 18704980 A JP18704980 A JP 18704980A JP S57111623 A JPS57111623 A JP S57111623A
Authority
JP
Japan
Prior art keywords
service
timer
accepted
service request
adder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18704980A
Other languages
Japanese (ja)
Inventor
Tomonaga Ooyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18704980A priority Critical patent/JPS57111623A/en
Publication of JPS57111623A publication Critical patent/JPS57111623A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)

Abstract

PURPOSE:To equalize realization of the service request from each by suppressing the other service requests forcibly and accepting the service request which fails to be accepted despite prescribed times of requesting. CONSTITUTION:When service requests from a channel CH#1 are not accepted, an adder 1 adds the times of said requests. After counting of constant times, it suppresses the service requets from other channels and outputs a signal of its own service request priority. A timer 4 sustains the service request time of the own channel. When the own system service is accepted within constant times, the counting of the adder 1 and the timer 4 are reset. In case it is not accepted, the output of the adder 1 starts the timer 4, and turns off AND circuits other than an AND circuit 6-1 from an inverter 3 through an FF2, thereby suppressing the other channels. Upon lapse of a constant time, the AND circuits having been turned off are restored by the output of the timer 4.
JP18704980A 1980-12-27 1980-12-27 Channel service equalizing system Pending JPS57111623A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18704980A JPS57111623A (en) 1980-12-27 1980-12-27 Channel service equalizing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18704980A JPS57111623A (en) 1980-12-27 1980-12-27 Channel service equalizing system

Publications (1)

Publication Number Publication Date
JPS57111623A true JPS57111623A (en) 1982-07-12

Family

ID=16199274

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18704980A Pending JPS57111623A (en) 1980-12-27 1980-12-27 Channel service equalizing system

Country Status (1)

Country Link
JP (1) JPS57111623A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63204353A (en) * 1987-02-19 1988-08-24 Fujitsu Ltd Common bus coupling system
JPH0756849A (en) * 1993-08-13 1995-03-03 Nec Corp Bus arbitrating system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63204353A (en) * 1987-02-19 1988-08-24 Fujitsu Ltd Common bus coupling system
JPH0756849A (en) * 1993-08-13 1995-03-03 Nec Corp Bus arbitrating system

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