JPS57107661A - Reception synchronism system for training signal - Google Patents

Reception synchronism system for training signal

Info

Publication number
JPS57107661A
JPS57107661A JP55183611A JP18361180A JPS57107661A JP S57107661 A JPS57107661 A JP S57107661A JP 55183611 A JP55183611 A JP 55183611A JP 18361180 A JP18361180 A JP 18361180A JP S57107661 A JPS57107661 A JP S57107661A
Authority
JP
Japan
Prior art keywords
phase
signal
circuit
phase modulation
modulation wave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55183611A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0370421B2 (enrdf_load_stackoverflow
Inventor
Takashi Kaku
Shigeyuki Umigami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55183611A priority Critical patent/JPS57107661A/ja
Publication of JPS57107661A publication Critical patent/JPS57107661A/ja
Publication of JPH0370421B2 publication Critical patent/JPH0370421B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/18Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22Demodulator circuits; Receiver circuits
    • H04L27/227Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2271Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
    • H04L27/2273Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals associated with quadrature demodulation, e.g. Costas loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP55183611A 1980-12-24 1980-12-24 Reception synchronism system for training signal Granted JPS57107661A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55183611A JPS57107661A (en) 1980-12-24 1980-12-24 Reception synchronism system for training signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55183611A JPS57107661A (en) 1980-12-24 1980-12-24 Reception synchronism system for training signal

Publications (2)

Publication Number Publication Date
JPS57107661A true JPS57107661A (en) 1982-07-05
JPH0370421B2 JPH0370421B2 (enrdf_load_stackoverflow) 1991-11-07

Family

ID=16138816

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55183611A Granted JPS57107661A (en) 1980-12-24 1980-12-24 Reception synchronism system for training signal

Country Status (1)

Country Link
JP (1) JPS57107661A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62122336A (ja) * 1985-11-21 1987-06-03 Fujitsu Ltd トレ−ニング検出方式
JPH05106036A (ja) * 1992-03-30 1993-04-27 Hitachi Ltd 真空処理装置
JP2003524337A (ja) * 2000-02-21 2003-08-12 テラブス オーワイ デジタル通信経路上において適応型チャネル等化のトレーニング段階を実施するための方法および装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62122336A (ja) * 1985-11-21 1987-06-03 Fujitsu Ltd トレ−ニング検出方式
JPH05106036A (ja) * 1992-03-30 1993-04-27 Hitachi Ltd 真空処理装置
JP2003524337A (ja) * 2000-02-21 2003-08-12 テラブス オーワイ デジタル通信経路上において適応型チャネル等化のトレーニング段階を実施するための方法および装置

Also Published As

Publication number Publication date
JPH0370421B2 (enrdf_load_stackoverflow) 1991-11-07

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