JPS57100682A - Address buffer memory system - Google Patents
Address buffer memory systemInfo
- Publication number
- JPS57100682A JPS57100682A JP55176974A JP17697480A JPS57100682A JP S57100682 A JPS57100682 A JP S57100682A JP 55176974 A JP55176974 A JP 55176974A JP 17697480 A JP17697480 A JP 17697480A JP S57100682 A JPS57100682 A JP S57100682A
- Authority
- JP
- Japan
- Prior art keywords
- information
- addresses
- buffer memory
- physical
- accessed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
- G06F12/1054—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache the data cache being concurrently physically addressed
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
PURPOSE:To attain high-speed access to a large-scale buffer memory under simple control, by providing the buffer memory and a control table, which are accessed by virtual addresses, and by using physical addresses for the confirmation of the presence of information in the buffer memory. CONSTITUTION:An address converting means 200, when finding that physical addresses corresponding to logical addresses set in registers 111-113 are not present in a conversion table 300, supplies the physical addresses to the table 300. A buffer memory 400 is accessed by using the E and R of the registers 111-113 as addresses, and a control table 500 is accessed by the same addresses with the memory 400. Then, information in a physical address Q equivalent to a bit position equivalent to the E is also included in physical address information stored in the table 500. Further, all pieces of information higher in order than the R common to respective formats are included in the physical address information with which it is judged finally whether information is present in the memory 400 or not, thereby securing the judgement of the presence of the information.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55176974A JPS57100682A (en) | 1980-12-15 | 1980-12-15 | Address buffer memory system |
US06/328,774 US4482952A (en) | 1980-12-15 | 1981-12-08 | Virtual addressing system using page field comparisons to selectively validate cache buffer data on read main memory data |
FR8123302A FR2496315A1 (en) | 1980-12-15 | 1981-12-14 | BUFFER MEMORY SYSTEM |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55176974A JPS57100682A (en) | 1980-12-15 | 1980-12-15 | Address buffer memory system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57100682A true JPS57100682A (en) | 1982-06-22 |
Family
ID=16022959
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55176974A Pending JPS57100682A (en) | 1980-12-15 | 1980-12-15 | Address buffer memory system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57100682A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5415620A (en) * | 1977-07-06 | 1979-02-05 | Nec Corp | Buffer memory unit |
JPS55122286A (en) * | 1979-03-10 | 1980-09-19 | Fujitsu Ltd | Data processing system |
-
1980
- 1980-12-15 JP JP55176974A patent/JPS57100682A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5415620A (en) * | 1977-07-06 | 1979-02-05 | Nec Corp | Buffer memory unit |
JPS55122286A (en) * | 1979-03-10 | 1980-09-19 | Fujitsu Ltd | Data processing system |
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