JPS5698937A - Input and output characteristic conversion system by digital circuit - Google Patents

Input and output characteristic conversion system by digital circuit

Info

Publication number
JPS5698937A
JPS5698937A JP193480A JP193480A JPS5698937A JP S5698937 A JPS5698937 A JP S5698937A JP 193480 A JP193480 A JP 193480A JP 193480 A JP193480 A JP 193480A JP S5698937 A JPS5698937 A JP S5698937A
Authority
JP
Japan
Prior art keywords
data
input
memory
bits
correction value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP193480A
Other languages
Japanese (ja)
Inventor
Michio Nakagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP193480A priority Critical patent/JPS5698937A/en
Publication of JPS5698937A publication Critical patent/JPS5698937A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

PURPOSE:To enable remarkable cost reduction, by the characteristic conversion with digital memories having the data output of n' bits less than the address input of n bits. CONSTITUTION:The correction value correcting the difference between the nonlinear characteristic input data 1 and the linear characteristic output data 2, is obtained. This correction value is stored in the digital memory 3 having the address input of n bits and the data output of n' bits less than that. Next, the address of the memory 3 is selected with the parallel binary nonlinear characteristic input data 1 to read out this correction value. When the data read out from the memory 3 and the data 1 are input to the full adder 4 for subtraction and addition, the linear characteristic output data 2 is obtained from the adder 4. Thus, the capacity of the memory 3 can remarkably be reduced and remarkable cost reduction can be made.
JP193480A 1980-01-11 1980-01-11 Input and output characteristic conversion system by digital circuit Pending JPS5698937A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP193480A JPS5698937A (en) 1980-01-11 1980-01-11 Input and output characteristic conversion system by digital circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP193480A JPS5698937A (en) 1980-01-11 1980-01-11 Input and output characteristic conversion system by digital circuit

Publications (1)

Publication Number Publication Date
JPS5698937A true JPS5698937A (en) 1981-08-08

Family

ID=11515428

Family Applications (1)

Application Number Title Priority Date Filing Date
JP193480A Pending JPS5698937A (en) 1980-01-11 1980-01-11 Input and output characteristic conversion system by digital circuit

Country Status (1)

Country Link
JP (1) JPS5698937A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0289109A (en) * 1988-09-02 1990-03-29 Toshiba Corp Sine wave generation circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0289109A (en) * 1988-09-02 1990-03-29 Toshiba Corp Sine wave generation circuit

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