JPS568835A - Measurement of deep impurity level of semiconductor - Google Patents

Measurement of deep impurity level of semiconductor

Info

Publication number
JPS568835A
JPS568835A JP8341779A JP8341779A JPS568835A JP S568835 A JPS568835 A JP S568835A JP 8341779 A JP8341779 A JP 8341779A JP 8341779 A JP8341779 A JP 8341779A JP S568835 A JPS568835 A JP S568835A
Authority
JP
Japan
Prior art keywords
semiconductor
output
impurity level
temperature
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8341779A
Other languages
Japanese (ja)
Other versions
JPS5810853B2 (en
Inventor
Akira Usami
Yutaka Tokuda
Nobuyuki Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SPC Electronics Corp
Original Assignee
SPC Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SPC Electronics Corp filed Critical SPC Electronics Corp
Priority to JP8341779A priority Critical patent/JPS5810853B2/en
Publication of JPS568835A publication Critical patent/JPS568835A/en
Publication of JPS5810853B2 publication Critical patent/JPS5810853B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)

Abstract

PURPOSE:To improve the S/N ratio for a method of measuring the deep impurity level of a semiconductor and enhance the measuring accuracy thereof by using a signal varying in rectangular waveform as a function signal weighed to be added to a capacitance meter used for the measurement of the impurity level. CONSTITUTION:A specimen semiconductor 1 is contained in a low temperature tank 2 varying at temperature from a liquid nitrogen temperature to room temperature, and is connected to a capacitance meter 3 for measuring the junction capacity of the semiconductor 1. Then, the output is amplified through an amplifier 5, and is connected through the first circuit 6 to an analog switch 9 for forming a weighing function signal, and the branched output of the amplifier 5 is connected through the second circuit 7 and an inverter 8 to the switch 9. Thereafter, the output of the swtich 9 is applied through a BPF10 to a temperature sensor 12 provided in the tank 2 and to an XY recorder. In this manner, the switching output of the switch 9 is applied through a timing controller 14 connected to a clock pulse generator 13 to a bias pulse generator 4, and the output from the generator 4 controls the meter 3 to form a signal for supporting the semiconductor 1 in rectangular waveform.
JP8341779A 1979-07-03 1979-07-03 Method for measuring deep impurity levels in semiconductors Expired JPS5810853B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8341779A JPS5810853B2 (en) 1979-07-03 1979-07-03 Method for measuring deep impurity levels in semiconductors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8341779A JPS5810853B2 (en) 1979-07-03 1979-07-03 Method for measuring deep impurity levels in semiconductors

Publications (2)

Publication Number Publication Date
JPS568835A true JPS568835A (en) 1981-01-29
JPS5810853B2 JPS5810853B2 (en) 1983-02-28

Family

ID=13801853

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8341779A Expired JPS5810853B2 (en) 1979-07-03 1979-07-03 Method for measuring deep impurity levels in semiconductors

Country Status (1)

Country Link
JP (1) JPS5810853B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5724546A (en) * 1980-06-07 1982-02-09 Majiaaru Toudomaaniyosu Akadee Method and device for transiently spectrally scanning in deep level
JPS58135650A (en) * 1981-11-09 1983-08-12 マジヤ−ル ツドマンヨス アカデミア ムサキ フイジカイ クタト インテゼテ Method and device for measuring energy state charged in electric material by excess spectral method of deep level
JP2010103144A (en) * 2008-10-21 2010-05-06 Shin Etsu Handotai Co Ltd N-type silicon epitaxial wafer, and evaluating method and manufacturing method therefor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5724546A (en) * 1980-06-07 1982-02-09 Majiaaru Toudomaaniyosu Akadee Method and device for transiently spectrally scanning in deep level
JPS58135650A (en) * 1981-11-09 1983-08-12 マジヤ−ル ツドマンヨス アカデミア ムサキ フイジカイ クタト インテゼテ Method and device for measuring energy state charged in electric material by excess spectral method of deep level
JP2010103144A (en) * 2008-10-21 2010-05-06 Shin Etsu Handotai Co Ltd N-type silicon epitaxial wafer, and evaluating method and manufacturing method therefor

Also Published As

Publication number Publication date
JPS5810853B2 (en) 1983-02-28

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