JPS5685932A - Sequential comparison type analog-digital converter - Google Patents
Sequential comparison type analog-digital converterInfo
- Publication number
- JPS5685932A JPS5685932A JP16497179A JP16497179A JPS5685932A JP S5685932 A JPS5685932 A JP S5685932A JP 16497179 A JP16497179 A JP 16497179A JP 16497179 A JP16497179 A JP 16497179A JP S5685932 A JPS5685932 A JP S5685932A
- Authority
- JP
- Japan
- Prior art keywords
- output
- memory
- pulse
- comparator
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
- H03M1/46—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
PURPOSE:To elevate the conversion accuracy, by reading an output of the comparator into the buffer memory by means of a control pulse which is generated earlier than a clock pulse, and reading this output into the memory in accordance with an output of the shift counter. CONSTITUTION:An output of the comparator 1 is read into the buffer memory 12 which is controlled by a control pulse D having pulse width T2, from the terminal 13. The pulse D is provided to the memory 12 by time T2 earlier timing than the leading edge of the clock pulse A applied by the terminal 6. In this way, only the output which has operated in the stable area causing no conversion error of the comparator 1 by avoiding a spike noise N of the analog input power voltage E of the comparator 1, generated by the leading edge of the pulse A is extracted by the memory 12, and it is input to the memory 3 in accordance with the output of the shift counter 4. The output of the memory 3 is controlled by the current switch 5 by which a weighted reference current corresponding to 1-n bits flows, and a digital signal of (n) bits is output from the terminal 9.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16497179A JPS5685932A (en) | 1979-12-14 | 1979-12-14 | Sequential comparison type analog-digital converter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16497179A JPS5685932A (en) | 1979-12-14 | 1979-12-14 | Sequential comparison type analog-digital converter |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5685932A true JPS5685932A (en) | 1981-07-13 |
Family
ID=15803352
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16497179A Pending JPS5685932A (en) | 1979-12-14 | 1979-12-14 | Sequential comparison type analog-digital converter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5685932A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6064278A (en) * | 1997-10-28 | 2000-05-16 | Denso Corporation | Structure of pulse-width modulator |
-
1979
- 1979-12-14 JP JP16497179A patent/JPS5685932A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6064278A (en) * | 1997-10-28 | 2000-05-16 | Denso Corporation | Structure of pulse-width modulator |
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