JPS5684037A - Noise reducing device - Google Patents

Noise reducing device

Info

Publication number
JPS5684037A
JPS5684037A JP16177679A JP16177679A JPS5684037A JP S5684037 A JPS5684037 A JP S5684037A JP 16177679 A JP16177679 A JP 16177679A JP 16177679 A JP16177679 A JP 16177679A JP S5684037 A JPS5684037 A JP S5684037A
Authority
JP
Japan
Prior art keywords
noise
amplifier
supplied
reducing device
noise reducing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16177679A
Other languages
Japanese (ja)
Inventor
Hiromitsu Takami
Hideo Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP16177679A priority Critical patent/JPS5684037A/en
Publication of JPS5684037A publication Critical patent/JPS5684037A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Noise Elimination (AREA)

Abstract

PURPOSE:To enable secure noise detection with a little malfunction by leading a noise detection output out of an IF amplifier. CONSTITUTION:A noise is detected at an initial stage 15 of the IF amplifier which is not under an influence of a limiter. Since large AM variation when a pulse noise exists appears at this position, AM detector 19 detects that and its detection output is supplied to noise amplifier 4 via capacitors C1 and C2. The output of noise amplifier 4 is supplied to gate circuit 7 by way of detecting circuit 5 and gate pulse generating circuit 6 to cut off an AF signal only when a noise component exists.
JP16177679A 1979-12-12 1979-12-12 Noise reducing device Pending JPS5684037A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16177679A JPS5684037A (en) 1979-12-12 1979-12-12 Noise reducing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16177679A JPS5684037A (en) 1979-12-12 1979-12-12 Noise reducing device

Publications (1)

Publication Number Publication Date
JPS5684037A true JPS5684037A (en) 1981-07-09

Family

ID=15741682

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16177679A Pending JPS5684037A (en) 1979-12-12 1979-12-12 Noise reducing device

Country Status (1)

Country Link
JP (1) JPS5684037A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02180435A (en) * 1988-12-30 1990-07-13 Icom Inc Squelch circuit and multimode receiver equipped with the squelch circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02180435A (en) * 1988-12-30 1990-07-13 Icom Inc Squelch circuit and multimode receiver equipped with the squelch circuit

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