JPS5683891A - Semiconductor storage device - Google Patents

Semiconductor storage device

Info

Publication number
JPS5683891A
JPS5683891A JP16207979A JP16207979A JPS5683891A JP S5683891 A JPS5683891 A JP S5683891A JP 16207979 A JP16207979 A JP 16207979A JP 16207979 A JP16207979 A JP 16207979A JP S5683891 A JPS5683891 A JP S5683891A
Authority
JP
Japan
Prior art keywords
connect
constitution
peripheral device
lines
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16207979A
Other languages
English (en)
Other versions
JPS6155198B2 (ja
Inventor
Junji Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16207979A priority Critical patent/JPS5683891A/ja
Priority to EP80304461A priority patent/EP0031659B1/en
Priority to DE8585101832T priority patent/DE3072204T2/de
Priority to EP85101832A priority patent/EP0155521B1/en
Priority to DE8080304461T priority patent/DE3071607D1/de
Priority to US06/216,674 priority patent/US4418399A/en
Publication of JPS5683891A publication Critical patent/JPS5683891A/ja
Publication of JPS6155198B2 publication Critical patent/JPS6155198B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18—Bit line organisation; Bit line lay-out
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
JP16207979A 1979-12-13 1979-12-13 Semiconductor storage device Granted JPS5683891A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP16207979A JPS5683891A (en) 1979-12-13 1979-12-13 Semiconductor storage device
EP80304461A EP0031659B1 (en) 1979-12-13 1980-12-11 A semiconductor memory device having a memory matrix area and a plurality of peripheral circuits
DE8585101832T DE3072204T2 (de) 1979-12-13 1980-12-11 Halbleiterspeicheranordnung.
EP85101832A EP0155521B1 (en) 1979-12-13 1980-12-11 A semiconductor memory device
DE8080304461T DE3071607D1 (en) 1979-12-13 1980-12-11 A semiconductor memory device having a memory matrix area and a plurality of peripheral circuits
US06/216,674 US4418399A (en) 1979-12-13 1980-12-15 Semiconductor memory system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16207979A JPS5683891A (en) 1979-12-13 1979-12-13 Semiconductor storage device

Publications (2)

Publication Number Publication Date
JPS5683891A true JPS5683891A (en) 1981-07-08
JPS6155198B2 JPS6155198B2 (ja) 1986-11-26

Family

ID=15747680

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16207979A Granted JPS5683891A (en) 1979-12-13 1979-12-13 Semiconductor storage device

Country Status (4)

Country Link
US (1) US4418399A (ja)
EP (2) EP0155521B1 (ja)
JP (1) JPS5683891A (ja)
DE (2) DE3072204T2 (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02166690A (ja) * 1988-12-20 1990-06-27 Mitsubishi Electric Corp 半導体記憶装置
JPH05114285A (ja) * 1991-10-22 1993-05-07 Sharp Corp 半導体記憶装置
JPH10303387A (ja) * 1997-04-28 1998-11-13 Mitsubishi Electric Corp 半導体記憶装置

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6059677B2 (ja) * 1981-08-19 1985-12-26 富士通株式会社 半導体記憶装置
US4750154A (en) * 1984-07-10 1988-06-07 Prime Computer, Inc. Memory alignment system and method
BR8503161A (pt) * 1984-07-31 1986-03-25 Int Standard Electric Corp Metodo para investigar uma matriz de associacao
US4979145A (en) * 1986-05-01 1990-12-18 Motorola, Inc. Structure and method for improving high speed data rate in a DRAM
JPH088304B2 (ja) * 1987-08-19 1996-01-29 富士通株式会社 半導体集積回路装置及びその設計方法
US5016216A (en) * 1988-10-17 1991-05-14 Waferscale Integration, Inc. Decoder for a floating gate memory
JPH081946B2 (ja) * 1990-01-26 1996-01-10 株式会社東芝 半導体集積回路
JP2982920B2 (ja) * 1990-07-10 1999-11-29 三菱電機株式会社 半導体記憶装置
JPH0562461A (ja) * 1991-04-09 1993-03-12 Mitsubishi Electric Corp 半導体記憶装置
KR940007639B1 (ko) * 1991-07-23 1994-08-22 삼성전자 주식회사 분할된 입출력 라인을 갖는 데이타 전송회로
JPH08172169A (ja) * 1994-12-16 1996-07-02 Toshiba Microelectron Corp 半導体記憶装置
DE602005006791D1 (de) * 2005-07-28 2008-06-26 St Microelectronics Srl Halbleiterspeicher und sein Seitenpufferspeicher mit verbessertem Layout

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5349969A (en) * 1976-10-18 1978-05-06 Hitachi Ltd Semiconductor memory unit

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3814846A (en) * 1972-01-20 1974-06-04 Reticon Corp High density photodetection array
US3909808A (en) * 1974-12-23 1975-09-30 Ibm Minimum pitch mosfet decoder circuit configuration
JPS5539073B2 (ja) * 1974-12-25 1980-10-08
JPS51113545A (en) * 1975-03-31 1976-10-06 Hitachi Ltd Memory
DE2557165C3 (de) * 1975-12-18 1979-01-18 Siemens Ag, 1000 Berlin Und 8000 Muenchen Decoderschaltung und ihre Anordnung zur Integrierung auf einem Halbleiterbaustein
US4156938A (en) * 1975-12-29 1979-05-29 Mostek Corporation MOSFET Memory chip with single decoder and bi-level interconnect lines
US4045783A (en) * 1976-04-12 1977-08-30 Standard Microsystems Corporation Mos one transistor cell ram having divided and balanced bit lines, coupled by regenerative flip-flop sense amplifiers, and balanced access circuitry
DE2647394C2 (de) * 1976-10-20 1978-11-16 Siemens Ag, 1000 Berlin Und 8000 Muenchen MOS-Halbleiterspeicherbaustein
DE2746336A1 (de) * 1977-10-14 1979-04-19 Siemens Ag Dynamischer halbleiterspeicher mit einer matrix aus ein-transistor-speicherzellen
US4160275A (en) * 1978-04-03 1979-07-03 International Business Machines Corporation Accessing arrangement for memories with small cells
DE2919166C2 (de) * 1978-05-12 1986-01-02 Nippon Electric Co., Ltd., Tokio/Tokyo Speichervorrichtung
JPS5542344A (en) * 1978-09-21 1980-03-25 Toshiba Corp Mos type dynamic memory unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5349969A (en) * 1976-10-18 1978-05-06 Hitachi Ltd Semiconductor memory unit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02166690A (ja) * 1988-12-20 1990-06-27 Mitsubishi Electric Corp 半導体記憶装置
JPH05114285A (ja) * 1991-10-22 1993-05-07 Sharp Corp 半導体記憶装置
JPH10303387A (ja) * 1997-04-28 1998-11-13 Mitsubishi Electric Corp 半導体記憶装置

Also Published As

Publication number Publication date
DE3071607D1 (en) 1986-06-19
EP0031659B1 (en) 1986-05-14
EP0031659A3 (en) 1981-07-15
EP0155521A3 (en) 1988-12-14
US4418399A (en) 1983-11-29
EP0155521B1 (en) 1992-11-11
DE3072204T2 (de) 1993-03-25
EP0155521A2 (en) 1985-09-25
JPS6155198B2 (ja) 1986-11-26
DE3072204D1 (de) 1992-12-17
EP0031659A2 (en) 1981-07-08

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