JPS5680894A - Memory device - Google Patents

Memory device

Info

Publication number
JPS5680894A
JPS5680894A JP15574379A JP15574379A JPS5680894A JP S5680894 A JPS5680894 A JP S5680894A JP 15574379 A JP15574379 A JP 15574379A JP 15574379 A JP15574379 A JP 15574379A JP S5680894 A JPS5680894 A JP S5680894A
Authority
JP
Japan
Prior art keywords
retained
power source
cycle
disconnection
during
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15574379A
Other languages
Japanese (ja)
Inventor
Kan Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15574379A priority Critical patent/JPS5680894A/en
Publication of JPS5680894A publication Critical patent/JPS5680894A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make the access operated without an error during the power is being in disconnection with the memory itself by detecting the recovery of the power source and producing a pulse for one cycle by usig the data retained during disconnection.
CONSTITUTION: When the disconnection of the power source is generated during a memory is in access the battery voltage is applied to a memory chip power source terminal. Then, an address information in the cycle of the cutting is retained in the registers 1-A, 1-B, and the data is retained by the latch 4-1 and a read/write information is retained in the latches 4-3, 4-4. When the power source voltage is recovered, the output of the power source voltage detecting circuit 16 rises and at the same time, a pulse during the recovery time for one cycle is generated by a pulse generator 17. Only the decoder 2-A and the decoder and the data I/02-B act to carry out the operation due to the information retained in the respective latches. Upon the completion of this internal cycle, the device is easily used and enhance the reliability by the external access.
COPYRIGHT: (C)1981,JPO&Japio
JP15574379A 1979-12-01 1979-12-01 Memory device Pending JPS5680894A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15574379A JPS5680894A (en) 1979-12-01 1979-12-01 Memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15574379A JPS5680894A (en) 1979-12-01 1979-12-01 Memory device

Publications (1)

Publication Number Publication Date
JPS5680894A true JPS5680894A (en) 1981-07-02

Family

ID=15612455

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15574379A Pending JPS5680894A (en) 1979-12-01 1979-12-01 Memory device

Country Status (1)

Country Link
JP (1) JPS5680894A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6073720A (en) * 1983-09-29 1985-04-25 Nissin Electric Co Ltd Stand-by mode changeover circuit of random access memory
JPS6354616A (en) * 1986-08-25 1988-03-09 Mitsubishi Electric Corp Microcomputer system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6073720A (en) * 1983-09-29 1985-04-25 Nissin Electric Co Ltd Stand-by mode changeover circuit of random access memory
JPS6354616A (en) * 1986-08-25 1988-03-09 Mitsubishi Electric Corp Microcomputer system

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