JPS5675754A - Synchronizing signal pickup system - Google Patents

Synchronizing signal pickup system

Info

Publication number
JPS5675754A
JPS5675754A JP15241779A JP15241779A JPS5675754A JP S5675754 A JPS5675754 A JP S5675754A JP 15241779 A JP15241779 A JP 15241779A JP 15241779 A JP15241779 A JP 15241779A JP S5675754 A JPS5675754 A JP S5675754A
Authority
JP
Japan
Prior art keywords
circuit
output
agc2
period
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15241779A
Other languages
Japanese (ja)
Inventor
Shizuo Sugiyama
Masatoshi Kawashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Denshi KK
Original Assignee
Hitachi Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK filed Critical Hitachi Denshi KK
Priority to JP15241779A priority Critical patent/JPS5675754A/en
Publication of JPS5675754A publication Critical patent/JPS5675754A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To increase the transmission efficiency of data, by giving the output of an automatic gain adjusting circuit to a resonance circuit, after saturation period by leading response when a multi-phase modulation signal is given to the automatic gain control circuit. CONSTITUTION:A switch 9 is inserted between an AGC2 and a nonlinear circuit 3. Further, the switch 9 is operated with the time-up output of a timer circuit 10 started with the output of a carrier detection circuit 6, and the input of the nonlinear circuit 3 is switched from a termination resistor 11 to the output of the AGC2. After the period adding some allowance period to the saturation period of the AGC2, the timer circuit 10 produces the time up output (g) and the switch 9 is operated by it.
JP15241779A 1979-11-27 1979-11-27 Synchronizing signal pickup system Pending JPS5675754A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15241779A JPS5675754A (en) 1979-11-27 1979-11-27 Synchronizing signal pickup system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15241779A JPS5675754A (en) 1979-11-27 1979-11-27 Synchronizing signal pickup system

Publications (1)

Publication Number Publication Date
JPS5675754A true JPS5675754A (en) 1981-06-23

Family

ID=15540048

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15241779A Pending JPS5675754A (en) 1979-11-27 1979-11-27 Synchronizing signal pickup system

Country Status (1)

Country Link
JP (1) JPS5675754A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5486210A (en) * 1977-12-21 1979-07-09 Fujitsu Ltd Multi-frequency signal receiver

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5486210A (en) * 1977-12-21 1979-07-09 Fujitsu Ltd Multi-frequency signal receiver

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