JPS567568A - Data processing circuit - Google Patents
Data processing circuitInfo
- Publication number
- JPS567568A JPS567568A JP8322779A JP8322779A JPS567568A JP S567568 A JPS567568 A JP S567568A JP 8322779 A JP8322779 A JP 8322779A JP 8322779 A JP8322779 A JP 8322779A JP S567568 A JPS567568 A JP S567568A
- Authority
- JP
- Japan
- Prior art keywords
- data
- memory
- output
- stored
- sampling output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
- H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
- H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
- H04N3/22—Circuits for controlling dimensions, shape or centering of picture on screen
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Video Image Reproduction Devices For Color Tv Systems (AREA)
- Details Of Television Scanning (AREA)
Abstract
PURPOSE:To enable to reduce the memory capacity, by storing the difference between the sampling output to be stored and the sampling output immediately before it, in the horizontal linearity improving circuit for beam index type color television receiver. CONSTITUTION:In storing the data (sampling output) of each cross point of m- division of effective screen horizontally and n-division of it vertically to the memory as the data for correction, the first sampling output is stored as the data as it is and the sampling output succeeding to it is stored as the data for the sampling output of difference. The first data stored in the memory 11 is loaded in the buffer memory 13 via the adder 18 as the memory output and the data of difference is added to the output data of the buffer memory 13 at the adder 18 and loaded as the memory output.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8322779A JPS567568A (en) | 1979-06-29 | 1979-06-29 | Data processing circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8322779A JPS567568A (en) | 1979-06-29 | 1979-06-29 | Data processing circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS567568A true JPS567568A (en) | 1981-01-26 |
Family
ID=13796427
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8322779A Pending JPS567568A (en) | 1979-06-29 | 1979-06-29 | Data processing circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS567568A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6190583A (en) * | 1984-10-09 | 1986-05-08 | Matsushita Electric Ind Co Ltd | Picture display device |
-
1979
- 1979-06-29 JP JP8322779A patent/JPS567568A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6190583A (en) * | 1984-10-09 | 1986-05-08 | Matsushita Electric Ind Co Ltd | Picture display device |
JPH0329352B2 (en) * | 1984-10-09 | 1991-04-23 | Matsushita Electric Ind Co Ltd |
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