JPS5674995A - Method of fabricating multilyaer circuit board - Google Patents

Method of fabricating multilyaer circuit board

Info

Publication number
JPS5674995A
JPS5674995A JP15153279A JP15153279A JPS5674995A JP S5674995 A JPS5674995 A JP S5674995A JP 15153279 A JP15153279 A JP 15153279A JP 15153279 A JP15153279 A JP 15153279A JP S5674995 A JPS5674995 A JP S5674995A
Authority
JP
Japan
Prior art keywords
multilyaer
fabricating
circuit board
board
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15153279A
Other languages
English (en)
Japanese (ja)
Other versions
JPS634360B2 (enExample
Inventor
Tatsuo Inoue
Hikari Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP15153279A priority Critical patent/JPS5674995A/ja
Publication of JPS5674995A publication Critical patent/JPS5674995A/ja
Publication of JPS634360B2 publication Critical patent/JPS634360B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
JP15153279A 1979-11-22 1979-11-22 Method of fabricating multilyaer circuit board Granted JPS5674995A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15153279A JPS5674995A (en) 1979-11-22 1979-11-22 Method of fabricating multilyaer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15153279A JPS5674995A (en) 1979-11-22 1979-11-22 Method of fabricating multilyaer circuit board

Publications (2)

Publication Number Publication Date
JPS5674995A true JPS5674995A (en) 1981-06-20
JPS634360B2 JPS634360B2 (enExample) 1988-01-28

Family

ID=15520566

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15153279A Granted JPS5674995A (en) 1979-11-22 1979-11-22 Method of fabricating multilyaer circuit board

Country Status (1)

Country Link
JP (1) JPS5674995A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58128797A (ja) * 1982-01-27 1983-08-01 日本電気株式会社 多層セラミツク基板の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58128797A (ja) * 1982-01-27 1983-08-01 日本電気株式会社 多層セラミツク基板の製造方法

Also Published As

Publication number Publication date
JPS634360B2 (enExample) 1988-01-28

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