JPS567164A - Electronic computer - Google Patents

Electronic computer

Info

Publication number
JPS567164A
JPS567164A JP8316379A JP8316379A JPS567164A JP S567164 A JPS567164 A JP S567164A JP 8316379 A JP8316379 A JP 8316379A JP 8316379 A JP8316379 A JP 8316379A JP S567164 A JPS567164 A JP S567164A
Authority
JP
Japan
Prior art keywords
contents
signal
display
register
control part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8316379A
Other languages
Japanese (ja)
Inventor
Hiroo Katsura
Shigeo Yoneda
Isao Fujisawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP8316379A priority Critical patent/JPS567164A/en
Publication of JPS567164A publication Critical patent/JPS567164A/en
Pending legal-status Critical Current

Links

Landscapes

  • Calculators And Similar Devices (AREA)
  • Input From Keyboards Or The Like (AREA)

Abstract

PURPOSE: To prevent the misprocess previously for the computer providing input buffer IB which holds the information supplied via the key under execution of the operation, by displaying the contents of IB at the display unit under execution of the operation.
CONSTITUTION: The data sent from keyboard KB is coded by decoder DC and then supplied to IB. Arithmetic control part CU takes in the contents of IB and uses registers X, Y and Z each for execution of the operation, and then delivers signal S1 in getting through with the operation. With generation of signal S1, gate G1 transfers the contents of register X to display register DR via input control part IC but transfers the contents of IB to DR under execution of the operation during which no signal S1 is generated yet. Code converting circuit CC converts the input code sent from IB into the display code to deliver it. Control part IC supplies the contents of register X by shifting it close to the left of DR in case when signal S1 is generated and then supplied the contents of IB by shifting it close to the right of DR in case when no signal S1 is generated respectively. Thus the distinction is given between the display after the end of operation and the display of IB.
COPYRIGHT: (C)1981,JPO&Japio
JP8316379A 1979-06-30 1979-06-30 Electronic computer Pending JPS567164A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8316379A JPS567164A (en) 1979-06-30 1979-06-30 Electronic computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8316379A JPS567164A (en) 1979-06-30 1979-06-30 Electronic computer

Publications (1)

Publication Number Publication Date
JPS567164A true JPS567164A (en) 1981-01-24

Family

ID=13794581

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8316379A Pending JPS567164A (en) 1979-06-30 1979-06-30 Electronic computer

Country Status (1)

Country Link
JP (1) JPS567164A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5988627A (en) * 1982-11-15 1984-05-22 Fuji Electric Co Ltd Liquid level inspector for container

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5988627A (en) * 1982-11-15 1984-05-22 Fuji Electric Co Ltd Liquid level inspector for container

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