JPS5668911A - Diagnosing circuit for magnetic memory device - Google Patents

Diagnosing circuit for magnetic memory device

Info

Publication number
JPS5668911A
JPS5668911A JP14547779A JP14547779A JPS5668911A JP S5668911 A JPS5668911 A JP S5668911A JP 14547779 A JP14547779 A JP 14547779A JP 14547779 A JP14547779 A JP 14547779A JP S5668911 A JPS5668911 A JP S5668911A
Authority
JP
Japan
Prior art keywords
delay element
disk
read
write
head
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14547779A
Other languages
Japanese (ja)
Inventor
Masakazu Kawamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14547779A priority Critical patent/JPS5668911A/en
Publication of JPS5668911A publication Critical patent/JPS5668911A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To detect a fault point by sending test data back by changing a magnetic head over to a delay element when performing read and write operation by the same head.
CONSTITUTION: In response to the switch control signal of DPCA, switch 9 is switched to disconnect magnetic head 11 and to connect delay element 10, thereby constituting a signal sending-back circuit. Magnetic disk 4 is made ready for writing and test data from central processor 1 enters delay element 10 as write signal W from disk pack controller 2 by way of read/write amplifier 6 for magnetic disk 4, head matrix 7 and switch circuit 9. After the delay time, the read operation is performed and data are sent to the central processor in the reverse order. By those sent signals, processor 1 decides whether disk 4 is in normal operation or not.
COPYRIGHT: (C)1981,JPO&Japio
JP14547779A 1979-11-12 1979-11-12 Diagnosing circuit for magnetic memory device Pending JPS5668911A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14547779A JPS5668911A (en) 1979-11-12 1979-11-12 Diagnosing circuit for magnetic memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14547779A JPS5668911A (en) 1979-11-12 1979-11-12 Diagnosing circuit for magnetic memory device

Publications (1)

Publication Number Publication Date
JPS5668911A true JPS5668911A (en) 1981-06-09

Family

ID=15386149

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14547779A Pending JPS5668911A (en) 1979-11-12 1979-11-12 Diagnosing circuit for magnetic memory device

Country Status (1)

Country Link
JP (1) JPS5668911A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5940310A (en) * 1982-08-30 1984-03-06 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Simulation for magnetic tape memory device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5940310A (en) * 1982-08-30 1984-03-06 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Simulation for magnetic tape memory device
JPH026148B2 (en) * 1982-08-30 1990-02-07 Intaanashonaru Bijinesu Mashiinzu Corp

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