JPS5657350A - Loop transmission system - Google Patents

Loop transmission system

Info

Publication number
JPS5657350A
JPS5657350A JP13379379A JP13379379A JPS5657350A JP S5657350 A JPS5657350 A JP S5657350A JP 13379379 A JP13379379 A JP 13379379A JP 13379379 A JP13379379 A JP 13379379A JP S5657350 A JPS5657350 A JP S5657350A
Authority
JP
Japan
Prior art keywords
channels
data
transfer
frame
stations
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13379379A
Other languages
English (en)
Inventor
Masahiro Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP13379379A priority Critical patent/JPS5657350A/ja
Publication of JPS5657350A publication Critical patent/JPS5657350A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks
    • H04L12/427—Loop networks with decentralised control
    • H04L12/43—Loop networks with decentralised control with synchronous transmission, e.g. time division multiplex [TDM], slotted rings

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Small-Scale Networks (AREA)
JP13379379A 1979-10-17 1979-10-17 Loop transmission system Pending JPS5657350A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13379379A JPS5657350A (en) 1979-10-17 1979-10-17 Loop transmission system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13379379A JPS5657350A (en) 1979-10-17 1979-10-17 Loop transmission system

Publications (1)

Publication Number Publication Date
JPS5657350A true JPS5657350A (en) 1981-05-19

Family

ID=15113142

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13379379A Pending JPS5657350A (en) 1979-10-17 1979-10-17 Loop transmission system

Country Status (1)

Country Link
JP (1) JPS5657350A (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63107251A (ja) * 1986-06-24 1988-05-12 Nippon Telegr & Teleph Corp <Ntt> ル−プ通信システムのタイムスロット割り当て方式
JPH02211741A (ja) * 1989-02-10 1990-08-23 Fujitsu Ltd スロッテッドリングのアクセス方式
JPH0313032A (ja) * 1989-06-09 1991-01-22 Nec Corp ループネットワークのアクセス制御方法及び装置
US5062035A (en) * 1986-06-24 1991-10-29 Kabushiki Kaisha Toshiba Time slot allocation for loop networks

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63107251A (ja) * 1986-06-24 1988-05-12 Nippon Telegr & Teleph Corp <Ntt> ル−プ通信システムのタイムスロット割り当て方式
US5062035A (en) * 1986-06-24 1991-10-29 Kabushiki Kaisha Toshiba Time slot allocation for loop networks
JPH02211741A (ja) * 1989-02-10 1990-08-23 Fujitsu Ltd スロッテッドリングのアクセス方式
JPH0313032A (ja) * 1989-06-09 1991-01-22 Nec Corp ループネットワークのアクセス制御方法及び装置

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