JPS564944A - Confirming unit for writing of channel selection in memory of channel selector of receiver - Google Patents

Confirming unit for writing of channel selection in memory of channel selector of receiver

Info

Publication number
JPS564944A
JPS564944A JP8014479A JP8014479A JPS564944A JP S564944 A JPS564944 A JP S564944A JP 8014479 A JP8014479 A JP 8014479A JP 8014479 A JP8014479 A JP 8014479A JP S564944 A JPS564944 A JP S564944A
Authority
JP
Japan
Prior art keywords
memory
channel
pulse
writing
write
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8014479A
Other languages
Japanese (ja)
Other versions
JPS6026324B2 (en
Inventor
Katsuaki Tomota
Masaru Takeshita
Kazuyoshi Ishii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP54080144A priority Critical patent/JPS6026324B2/en
Publication of JPS564944A publication Critical patent/JPS564944A/en
Publication of JPS6026324B2 publication Critical patent/JPS6026324B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J1/00—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general
    • H03J1/0008—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)

Abstract

PURPOSE:To make it possible to confirm the writing of channel selection data visually by constituting a circuit that prolongs a memory write operation time of tens milliseconds to a time width of 2-3sec by providing an integrating circuit. CONSTITUTION:When channel-selection data write instruction pulse wr is output from microcomputer COM to semiconductor memory M for channel selection, memory controller CNT outputs write/read pulse P to memory M, so that write data WD from COM will be written in memory M at fixed addresses. Once pulse wr is output, this pulse of several milliseconds is integrated by capacitor C1 in display unit DP, and consequently display element LED stays on for the time width of 2-3sec that is long enough for visual confirmation.
JP54080144A 1979-06-27 1979-06-27 Device for checking operation of writing tuning data into memory in receiver tuning device Expired JPS6026324B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54080144A JPS6026324B2 (en) 1979-06-27 1979-06-27 Device for checking operation of writing tuning data into memory in receiver tuning device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54080144A JPS6026324B2 (en) 1979-06-27 1979-06-27 Device for checking operation of writing tuning data into memory in receiver tuning device

Publications (2)

Publication Number Publication Date
JPS564944A true JPS564944A (en) 1981-01-19
JPS6026324B2 JPS6026324B2 (en) 1985-06-22

Family

ID=13710067

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54080144A Expired JPS6026324B2 (en) 1979-06-27 1979-06-27 Device for checking operation of writing tuning data into memory in receiver tuning device

Country Status (1)

Country Link
JP (1) JPS6026324B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58107715A (en) * 1981-12-22 1983-06-27 Sony Corp Channel selecting device
JPS58146987A (en) * 1982-02-26 1983-09-01 グローリー工業株式会社 Discharge controller for article discharger

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5239878U (en) * 1975-09-13 1977-03-22

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5239878U (en) * 1975-09-13 1977-03-22

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58107715A (en) * 1981-12-22 1983-06-27 Sony Corp Channel selecting device
JPH0251288B2 (en) * 1981-12-22 1990-11-07 Sony Corp
JPS58146987A (en) * 1982-02-26 1983-09-01 グローリー工業株式会社 Discharge controller for article discharger
JPS6244674B2 (en) * 1982-02-26 1987-09-22 Glory Kogyo Kk

Also Published As

Publication number Publication date
JPS6026324B2 (en) 1985-06-22

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