JPS5648155A - Package forming method for semiconductor - Google Patents

Package forming method for semiconductor

Info

Publication number
JPS5648155A
JPS5648155A JP12611479A JP12611479A JPS5648155A JP S5648155 A JPS5648155 A JP S5648155A JP 12611479 A JP12611479 A JP 12611479A JP 12611479 A JP12611479 A JP 12611479A JP S5648155 A JPS5648155 A JP S5648155A
Authority
JP
Japan
Prior art keywords
molds
joining
press
lead frame
impressions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12611479A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6119117B2 (enrdf_load_stackoverflow
Inventor
Keiji Hazama
Mitsuyoshi Nakatsuka
Shinichi Oota
Fumio Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP12611479A priority Critical patent/JPS5648155A/ja
Publication of JPS5648155A publication Critical patent/JPS5648155A/ja
Publication of JPS6119117B2 publication Critical patent/JPS6119117B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP12611479A 1979-09-27 1979-09-27 Package forming method for semiconductor Granted JPS5648155A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12611479A JPS5648155A (en) 1979-09-27 1979-09-27 Package forming method for semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12611479A JPS5648155A (en) 1979-09-27 1979-09-27 Package forming method for semiconductor

Publications (2)

Publication Number Publication Date
JPS5648155A true JPS5648155A (en) 1981-05-01
JPS6119117B2 JPS6119117B2 (enrdf_load_stackoverflow) 1986-05-15

Family

ID=14926974

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12611479A Granted JPS5648155A (en) 1979-09-27 1979-09-27 Package forming method for semiconductor

Country Status (1)

Country Link
JP (1) JPS5648155A (enrdf_load_stackoverflow)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5919359A (ja) * 1982-07-23 1984-01-31 Hitachi Chem Co Ltd 半導体類のパツケ−ジ成形方法
JPS62224949A (ja) * 1986-03-27 1987-10-02 S M C:Kk Ｉｃパツケ−ジ
US5298464A (en) * 1989-10-26 1994-03-29 Digital Equipment Corporation Method of mounting a tape automated bonded semiconductor in a housing using a compressor
JPH06252283A (ja) * 1993-02-24 1994-09-09 Kyocera Corp 半導体装置
US6696752B2 (en) * 2000-05-22 2004-02-24 Siliconware Precision Industries Co., Ltd. Encapsulated semiconductor device with flash-proof structure
US7170158B2 (en) * 2001-06-29 2007-01-30 Samsung Electronics Co., Ltd. Double-sided circuit board and multi-chip package including such a circuit board and method for manufacture

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5919359A (ja) * 1982-07-23 1984-01-31 Hitachi Chem Co Ltd 半導体類のパツケ−ジ成形方法
JPS62224949A (ja) * 1986-03-27 1987-10-02 S M C:Kk Ｉｃパツケ−ジ
US5298464A (en) * 1989-10-26 1994-03-29 Digital Equipment Corporation Method of mounting a tape automated bonded semiconductor in a housing using a compressor
JPH06252283A (ja) * 1993-02-24 1994-09-09 Kyocera Corp 半導体装置
US6696752B2 (en) * 2000-05-22 2004-02-24 Siliconware Precision Industries Co., Ltd. Encapsulated semiconductor device with flash-proof structure
US7170158B2 (en) * 2001-06-29 2007-01-30 Samsung Electronics Co., Ltd. Double-sided circuit board and multi-chip package including such a circuit board and method for manufacture

Also Published As

Publication number Publication date
JPS6119117B2 (enrdf_load_stackoverflow) 1986-05-15

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