JPS5645464B2 - - Google Patents
Info
- Publication number
- JPS5645464B2 JPS5645464B2 JP4970776A JP4970776A JPS5645464B2 JP S5645464 B2 JPS5645464 B2 JP S5645464B2 JP 4970776 A JP4970776 A JP 4970776A JP 4970776 A JP4970776 A JP 4970776A JP S5645464 B2 JPS5645464 B2 JP S5645464B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
- H03L7/193—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number the frequency divider/counter comprising a commutable pre-divider, e.g. a two modulus divider
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Superheterodyne Receivers (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4970776A JPS52132711A (en) | 1976-04-30 | 1976-04-30 | Frequency shift circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4970776A JPS52132711A (en) | 1976-04-30 | 1976-04-30 | Frequency shift circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS52132711A JPS52132711A (en) | 1977-11-07 |
| JPS5645464B2 true JPS5645464B2 (en, 2012) | 1981-10-26 |
Family
ID=12838651
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4970776A Granted JPS52132711A (en) | 1976-04-30 | 1976-04-30 | Frequency shift circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS52132711A (en, 2012) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS589436A (ja) * | 1981-06-15 | 1983-01-19 | Nec Corp | 位相同期発振器 |
| JPS59138124A (ja) * | 1983-01-28 | 1984-08-08 | Hitachi Ltd | 分周回路 |
-
1976
- 1976-04-30 JP JP4970776A patent/JPS52132711A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS52132711A (en) | 1977-11-07 |