JPS5644240A - Error rate supervisory circuit - Google Patents

Error rate supervisory circuit

Info

Publication number
JPS5644240A
JPS5644240A JP12118479A JP12118479A JPS5644240A JP S5644240 A JPS5644240 A JP S5644240A JP 12118479 A JP12118479 A JP 12118479A JP 12118479 A JP12118479 A JP 12118479A JP S5644240 A JPS5644240 A JP S5644240A
Authority
JP
Japan
Prior art keywords
error
data
error rate
false
receiving data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12118479A
Other languages
Japanese (ja)
Inventor
Shinichiro Aoki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP12118479A priority Critical patent/JPS5644240A/en
Publication of JPS5644240A publication Critical patent/JPS5644240A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/24Testing correct operation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

PURPOSE:To make it possible to detect the error rate of receiving data only with receiving data, by counting the number of false error pulses, which has a fixed relation to the number of error data, during a fixed time and by averaging them after D/A conversion. CONSTITUTION:False error pulse generator 1 generates the number of false error pulses which has a fixed relation to the number of error data included in receiving data and generated in transmission. Counter 4 counts false error pulses during the time of the gate pulse of N-bit length generated in a proper position of the transmission data part in the data burst to be measured, and contents of counter 4 are set to register 5. D/A converter 6 generates an analogue signal corresponding to the digital output held in register 7 and integrates this analogue signal by low-pass filter 7 and averages it, and this signal is output through amplifier 8 as a DC output voltage indicating an error rate.
JP12118479A 1979-09-20 1979-09-20 Error rate supervisory circuit Pending JPS5644240A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12118479A JPS5644240A (en) 1979-09-20 1979-09-20 Error rate supervisory circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12118479A JPS5644240A (en) 1979-09-20 1979-09-20 Error rate supervisory circuit

Publications (1)

Publication Number Publication Date
JPS5644240A true JPS5644240A (en) 1981-04-23

Family

ID=14804927

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12118479A Pending JPS5644240A (en) 1979-09-20 1979-09-20 Error rate supervisory circuit

Country Status (1)

Country Link
JP (1) JPS5644240A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS639399U (en) * 1986-06-30 1988-01-21
JP2009103284A (en) * 2007-10-25 2009-05-14 Kayaba Ind Co Ltd Double cylinder type shock absorber

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS639399U (en) * 1986-06-30 1988-01-21
JP2009103284A (en) * 2007-10-25 2009-05-14 Kayaba Ind Co Ltd Double cylinder type shock absorber

Similar Documents

Publication Publication Date Title
GB1014727A (en) Analogue to digital transducers
GB1161549A (en) Analog to Digital Converter
JPS5644240A (en) Error rate supervisory circuit
GB1302083A (en)
SE8105853L (en) DEVICE FOR DIGITALIZATION OF ANALOGUE SIGNAL
JPS6426164A (en) Speed detecting device
JPS5679963A (en) Waveform measuring method and its device
SU1597541A1 (en) Apparatus for reversive counting of bands in interferometers with internal phase modulation
JPS5717867A (en) Bottom-peak width measuring device
SU395792A1 (en) ANALOG PULSET RECORDER
FR2262793A1 (en) Digital quotient meter with numerical readout - has coupled and compared counters for pulse generator
SU757995A1 (en) Method and device for measuring signal amplitude with additive noise
SU615429A1 (en) Period duration digital meter
JPS5612122A (en) Pcm signal demodulating circuit
SU1404968A1 (en) Digital spectrum analyzer
JPS5587958A (en) Digital effective value meter
SU631976A1 (en) Speech signal recognition device
JPS5465582A (en) Judgement circuit of chattering time
SU764120A1 (en) Integrating vontage-to-code converter
JPS5516209A (en) Digital counting rate meter
SU892334A1 (en) Low frequency digital meter
SU754324A1 (en) Digital meter of carrier frequency of radio pulse signals
SU576545A1 (en) Device for measuring frequency deviation
SU532097A1 (en) Device for calculating a fractional function
JPS55138923A (en) Pulse width detecting device