JPS5642451A - Two-way/one-way converting circuit - Google Patents
Two-way/one-way converting circuitInfo
- Publication number
- JPS5642451A JPS5642451A JP11836379A JP11836379A JPS5642451A JP S5642451 A JPS5642451 A JP S5642451A JP 11836379 A JP11836379 A JP 11836379A JP 11836379 A JP11836379 A JP 11836379A JP S5642451 A JPS5642451 A JP S5642451A
- Authority
- JP
- Japan
- Prior art keywords
- buses
- way
- point
- change
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/14—Two-way operation using the same type of signal, i.e. duplex
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Bidirectional Digital Transmission (AREA)
- Small-Scale Networks (AREA)
Abstract
PURPOSE:To make it possible to transfer signals via many two-way buses with a less number of signal lines while converting two-way buses into one-way buses, by employing the constitution of an inverter, D type FF, buffer, and three-input N AND gate. CONSTITUTION:Converting circuit A inserted between two-way buses 1 and 2 at both-end parts of a couple of one-way buses 31 and 32 consists of inverter 4, D type FF5, buffer 6, and three-input NAND circuit 7. On buses 1 and 2, and 31 and 32, (a)-(d) are all at ''H'' and the D input and Q output of FF5 are both at ''H''. When signals at points (a) and (b) change, whether the change has been caused by buses 1 and 2 or buses 31 and 32 at the reception side is discriminated 5 to determine whether this signal change is to be transmitted to buses 31 and 32 at the reception side or not. Namely, when a request to hold point (a) at ''L'' is made, point (c) is held at ''L'' and point (b) is then held at ''L'', but point (d) stays at ''H''. Consequently, when the request to hold point (a) at ''H'' is made again, points (a), (b) and (c) are returned to ''H''.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11836379A JPS5642451A (en) | 1979-09-14 | 1979-09-14 | Two-way/one-way converting circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11836379A JPS5642451A (en) | 1979-09-14 | 1979-09-14 | Two-way/one-way converting circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5642451A true JPS5642451A (en) | 1981-04-20 |
Family
ID=14734845
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11836379A Pending JPS5642451A (en) | 1979-09-14 | 1979-09-14 | Two-way/one-way converting circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5642451A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013105284A (en) * | 2011-11-11 | 2013-05-30 | Nec Access Technica Ltd | Communication control method for bidirectional serial bus and bidirectional serial bus switch |
-
1979
- 1979-09-14 JP JP11836379A patent/JPS5642451A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013105284A (en) * | 2011-11-11 | 2013-05-30 | Nec Access Technica Ltd | Communication control method for bidirectional serial bus and bidirectional serial bus switch |
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