JPS5730177A - Address converter - Google Patents

Address converter

Info

Publication number
JPS5730177A
JPS5730177A JP10463080A JP10463080A JPS5730177A JP S5730177 A JPS5730177 A JP S5730177A JP 10463080 A JP10463080 A JP 10463080A JP 10463080 A JP10463080 A JP 10463080A JP S5730177 A JPS5730177 A JP S5730177A
Authority
JP
Japan
Prior art keywords
address
register
logical address
logical
adding circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10463080A
Other languages
Japanese (ja)
Inventor
Shoji Nakatani
Hiroshi Tamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10463080A priority Critical patent/JPS5730177A/en
Publication of JPS5730177A publication Critical patent/JPS5730177A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To achieve high-speed address conversion by detecting one address relating to two pages by an adding circuit. CONSTITUTION:An element address register 11 stored with the logical address LA of the starting element of element data, an interelement distance register 12, and an adding circuit 13 adding an interelement distance (d) to the logical address LA are provided. Further, an address converter consists of a logical address register 4 holding the result of the addition, a readout register 16 which stores temporarily the output of a converting buffer converting the page no. of the logical address register 4 into a physical page address, a detection part 14 which detects the logical address to be converted being that of the starting element, and an OR gate 15 performing OR operation.
JP10463080A 1980-07-30 1980-07-30 Address converter Pending JPS5730177A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10463080A JPS5730177A (en) 1980-07-30 1980-07-30 Address converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10463080A JPS5730177A (en) 1980-07-30 1980-07-30 Address converter

Publications (1)

Publication Number Publication Date
JPS5730177A true JPS5730177A (en) 1982-02-18

Family

ID=14385757

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10463080A Pending JPS5730177A (en) 1980-07-30 1980-07-30 Address converter

Country Status (1)

Country Link
JP (1) JPS5730177A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54142346A (en) * 1978-04-24 1979-11-06 Toray Industries Wavy blended fiber yarn and production
JP2013239183A (en) * 2008-02-26 2013-11-28 Qualcomm Inc System and method of data forwarding within execution unit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54142346A (en) * 1978-04-24 1979-11-06 Toray Industries Wavy blended fiber yarn and production
JPS6123294B2 (en) * 1978-04-24 1986-06-05 Toray Industries
JP2013239183A (en) * 2008-02-26 2013-11-28 Qualcomm Inc System and method of data forwarding within execution unit

Similar Documents

Publication Publication Date Title
BR7702823A (en) DATA PROCESSING SET WITH PERFECT INPUT / OUTPUT OPERATION
FR2486232B1 (en) CAPACITIVE-TYPE DISPLACEMENT CONVERSION DEVICE
JPS5730177A (en) Address converter
JPS5718071A (en) Address conversion controlling system
JPS57153375A (en) Automatic conversion system of half-square and full-square characters
JPS5683154A (en) Transmission method for pcm data
JPS52116101A (en) Packet multiplication unit
JPS53121538A (en) Information processor
JPS5296827A (en) Code reading circuit
JPS5343421A (en) Chinese character input device
JPS54531A (en) Channel control system
JPS5727348A (en) Address converter
JPS5757080A (en) Picture processing device
JPS5631176A (en) Character reader
JPS545623A (en) Code reading device
JPS5381029A (en) Information conversion circuit unit
JPS53142844A (en) Information processor
JPS5759261A (en) Information processor
JPS53106525A (en) Desk type calculator using audio
JPS56149626A (en) Channel device
JPS5294040A (en) Data processing unit
JPS5778255A (en) Picture information file device
JPS5427749A (en) Dynamic address converter
JPS5665523A (en) Signal conversion device
JPS52141163A (en) Sample hold circuit