JPS5636782A - Print control system of dot printer - Google Patents

Print control system of dot printer

Info

Publication number
JPS5636782A
JPS5636782A JP11316179A JP11316179A JPS5636782A JP S5636782 A JPS5636782 A JP S5636782A JP 11316179 A JP11316179 A JP 11316179A JP 11316179 A JP11316179 A JP 11316179A JP S5636782 A JPS5636782 A JP S5636782A
Authority
JP
Japan
Prior art keywords
dots
head
gates
column
dot printer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11316179A
Other languages
Japanese (ja)
Inventor
Fumihiro Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP11316179A priority Critical patent/JPS5636782A/en
Publication of JPS5636782A publication Critical patent/JPS5636782A/en
Pending legal-status Critical Current

Links

Landscapes

  • Dot-Matrix Printers And Others (AREA)

Abstract

PURPOSE: To increase the speed of printing without requiring large electric power instantaneously by driving dots of the head of a dot printer, nearly two by two.
CONSTITUTION: Input data are converted by character generator 1 into a pattern of five by seven dots, which is outputted to one-side terminals of AND gates 5aW5g, column by column assigned by column counter 2. Timing pulses are inputted to three-bit binary counter 3, whose output is inputted to decoder 4. The output of decoder 4 is shown in the table and supplied to the other-side input terminals of AND gates 5aW5g. The outputs of the AND gates controls driver transistors 6aW 6g to drive respective dots of head 7 of the printer. As shown in the table, dots in the head are driven, two by two, at a time.
COPYRIGHT: (C)1981,JPO&Japio
JP11316179A 1979-09-04 1979-09-04 Print control system of dot printer Pending JPS5636782A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11316179A JPS5636782A (en) 1979-09-04 1979-09-04 Print control system of dot printer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11316179A JPS5636782A (en) 1979-09-04 1979-09-04 Print control system of dot printer

Publications (1)

Publication Number Publication Date
JPS5636782A true JPS5636782A (en) 1981-04-10

Family

ID=14605089

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11316179A Pending JPS5636782A (en) 1979-09-04 1979-09-04 Print control system of dot printer

Country Status (1)

Country Link
JP (1) JPS5636782A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6081765A (en) * 1983-10-12 1985-05-09 Sanyo Electric Co Ltd Manufacturing method for paste type cadmium negative electrode plate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6081765A (en) * 1983-10-12 1985-05-09 Sanyo Electric Co Ltd Manufacturing method for paste type cadmium negative electrode plate
JPH0234434B2 (en) * 1983-10-12 1990-08-03 Sanyo Electric Co

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