JPS563590A - Ddc speed difference control unit - Google Patents
Ddc speed difference control unitInfo
- Publication number
- JPS563590A JPS563590A JP7803579A JP7803579A JPS563590A JP S563590 A JPS563590 A JP S563590A JP 7803579 A JP7803579 A JP 7803579A JP 7803579 A JP7803579 A JP 7803579A JP S563590 A JPS563590 A JP S563590A
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- speed
- digital
- speed reference
- control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P5/00—Arrangements specially adapted for regulating or controlling the speed or torque of two or more electric motors
- H02P5/46—Arrangements specially adapted for regulating or controlling the speed or torque of two or more electric motors for speed regulation of two or more dynamo-electric motors in relation to one another
- H02P5/50—Arrangements specially adapted for regulating or controlling the speed or torque of two or more electric motors for speed regulation of two or more dynamo-electric motors in relation to one another by comparing electrical values representing the speeds
- H02P5/51—Direct ratio control
Abstract
PURPOSE:To perform perfect difference control between motors by giving the value of plural reference pulse trains counted by common sampling time as digital speed reference for each motor. CONSTITUTION:Each pulse oscillator 2 generates the pulse trains RP of the frequency which are proportional to a target speed. A speed setting circuit 1 outputs the digital speed reference DD. The digital speed reference DD is displayed on a digital speed indicator 30 and also inputted to a speed control arithmetic section 2 by the computer in the control section of each motor. The pulse train speed reference RP and a pulse feed back signal FP from a pulse oscillator 7 are inputted to a PLL control circuit 11. The PLL control circuit 11 outputs an analog signal Y which is proportional to the phase difference between the pulse train speed reference RP and the feed back pulse FP. The pulse phase difference signal Y is added to the analog current reference in a current control section 3.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7803579A JPS563590A (en) | 1979-06-22 | 1979-06-22 | Ddc speed difference control unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7803579A JPS563590A (en) | 1979-06-22 | 1979-06-22 | Ddc speed difference control unit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS563590A true JPS563590A (en) | 1981-01-14 |
Family
ID=13650551
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7803579A Pending JPS563590A (en) | 1979-06-22 | 1979-06-22 | Ddc speed difference control unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS563590A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5313010A (en) * | 1988-12-27 | 1994-05-17 | Yamaha Corporation | Hand musical tone control apparatus |
-
1979
- 1979-06-22 JP JP7803579A patent/JPS563590A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5313010A (en) * | 1988-12-27 | 1994-05-17 | Yamaha Corporation | Hand musical tone control apparatus |
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