JPS5634248A - Frequency correction system in independent synchronization system - Google Patents

Abstract

PURPOSE:To make it possible to perform frequency correction without lowering of precision in lower slave stations, by causing upper slave stations, where the frequency is corrected directly from the master station, to generate a correctable signal and by causing lower slave stations to receive this signal and confirm normalcy of the transmission line. CONSTITUTION:In upper slave station 10, a clock signal held in a fixed frequency error range by the reference clock signal from the master is generated from clock supply unit 11. Correctable signal generating circuit 13 generates a correctable signal for a fixed time after correction of unit 11, this signal and the clock signal are multiplexed by multiplexing unit 14, and a frame pulse is added to them, and they are transmitted. In lower slave station 20, the frame pulse, the clock signal, and the correctable signal are extracted from the transmitted signal by multiplexing unit 21 and are applied to frame synchronizing circuit 22, clock supply unit 23, and correction control circuit 24 respectively. Circuit 24 controls unit 23 to correct the clock signal generated by circuit 23 by the clock signal from unit 21 when the synchronizing signal of frame synchronization from circuit 22 and the correctable signal are applied.