JPS5625847A - Change-over system of clock distribution system - Google Patents

Change-over system of clock distribution system

Info

Publication number
JPS5625847A
JPS5625847A JP10070679A JP10070679A JPS5625847A JP S5625847 A JPS5625847 A JP S5625847A JP 10070679 A JP10070679 A JP 10070679A JP 10070679 A JP10070679 A JP 10070679A JP S5625847 A JPS5625847 A JP S5625847A
Authority
JP
Japan
Prior art keywords
clock
failure
alarm
systems
produced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10070679A
Other languages
Japanese (ja)
Other versions
JPS6251013B2 (en
Inventor
Yoichi Ito
Satokazu Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP10070679A priority Critical patent/JPS5625847A/en
Publication of JPS5625847A publication Critical patent/JPS5625847A/en
Publication of JPS6251013B2 publication Critical patent/JPS6251013B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To switch the clock when the alarm appears at the entire system, by using that the monitor and alarm function in each system operates without fail if there is any failure in the clock relating to monitored area. CONSTITUTION:When the clock fed to the systems 6-n from the clock distribution boards 3, 4, is of two types, if there is any failure in the clocks, any alarm is produced from each system. That is, if one clock should fail, alarm as is produced and alarm ac is developed if other clock is in failure. Since the alarms produced at clock failure is common to the systems 6-n, the logical product is taken at the AND circuits 8a, 8b as to all the systems for the alarms as, ac, and the result is made to logical sum at the OR circuit 9. The signal SA indicating the failure of clock is obtained and switching is made based on this.
JP10070679A 1979-08-09 1979-08-09 Change-over system of clock distribution system Granted JPS5625847A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10070679A JPS5625847A (en) 1979-08-09 1979-08-09 Change-over system of clock distribution system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10070679A JPS5625847A (en) 1979-08-09 1979-08-09 Change-over system of clock distribution system

Publications (2)

Publication Number Publication Date
JPS5625847A true JPS5625847A (en) 1981-03-12
JPS6251013B2 JPS6251013B2 (en) 1987-10-28

Family

ID=14281125

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10070679A Granted JPS5625847A (en) 1979-08-09 1979-08-09 Change-over system of clock distribution system

Country Status (1)

Country Link
JP (1) JPS5625847A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5921156A (en) * 1982-07-27 1984-02-03 Pioneer Electronic Corp Lock detecting system of clock generating pll of digitally modulated signal reader

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS516408A (en) * 1974-07-05 1976-01-20 Hitachi Ltd
JPS5214303A (en) * 1976-07-29 1977-02-03 Nec Corp Synchronization error detection method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS516408A (en) * 1974-07-05 1976-01-20 Hitachi Ltd
JPS5214303A (en) * 1976-07-29 1977-02-03 Nec Corp Synchronization error detection method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5921156A (en) * 1982-07-27 1984-02-03 Pioneer Electronic Corp Lock detecting system of clock generating pll of digitally modulated signal reader

Also Published As

Publication number Publication date
JPS6251013B2 (en) 1987-10-28

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