JPS5619223A - Pulse duration expanding device - Google Patents
Pulse duration expanding deviceInfo
- Publication number
- JPS5619223A JPS5619223A JP9628679A JP9628679A JPS5619223A JP S5619223 A JPS5619223 A JP S5619223A JP 9628679 A JP9628679 A JP 9628679A JP 9628679 A JP9628679 A JP 9628679A JP S5619223 A JPS5619223 A JP S5619223A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- pulse duration
- voltage
- capacitor
- expanding device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/04—Shaping pulses by increasing duration; by decreasing duration
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Pulse Circuits (AREA)
- Electronic Switches (AREA)
Abstract
PURPOSE:To secure the steady working of the pulse duration expanding device, by clamping the terminal voltage of the capacitor to the prescribed level at the starting point of dischrarge and then setting the minimum input pulse duration necessary for generation of the output signal. CONSTITUTION:With application of the clamping input signal to terminal 10, transistor 11 is turned on. And the terminal volatage of capacitor 5 is clamped to the voltage of power source 9. Thus terminal volatage V0 of capacitor 5 can be kept constant at the starting point of discharge by carrying out said operation immediately before application of the input signal to terminal 1. On the other hand, the minimum input pulse duration (t) which is necessary for generation of the output signal to terminal 7 is set by the time constant during the discharge determined by value R3 of resistance 3 and capacity value C5 of capacitor 5 puls trigger voltage Vt of Schmitt trigger circuit 9 and voltage V0. Accordingly, duration (t) can be set to a fixed value as long as voltage V0 is constant. As a result, a pulse duration expanding device having an extremely steady working can be obtained.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9628679A JPS5619223A (en) | 1979-07-25 | 1979-07-25 | Pulse duration expanding device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9628679A JPS5619223A (en) | 1979-07-25 | 1979-07-25 | Pulse duration expanding device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5619223A true JPS5619223A (en) | 1981-02-23 |
Family
ID=14160845
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9628679A Pending JPS5619223A (en) | 1979-07-25 | 1979-07-25 | Pulse duration expanding device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5619223A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5976144U (en) * | 1982-11-11 | 1984-05-23 | 三菱電機株式会社 | Pulse insertion circuit |
| JPS6335117A (en) * | 1986-07-28 | 1988-02-15 | 株式会社アムテックス | Overcurrent protection circuit of electronic circuit device |
| US5028823A (en) * | 1988-08-06 | 1991-07-02 | Mitsubishi Denki Kabushiki Kaisha | Delay device with intermittent capacitor discharge |
| WO2008097678A1 (en) * | 2007-02-08 | 2008-08-14 | Allegro Microsystems, Inc. | Integrated fault output/fault response delay circuit |
-
1979
- 1979-07-25 JP JP9628679A patent/JPS5619223A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5976144U (en) * | 1982-11-11 | 1984-05-23 | 三菱電機株式会社 | Pulse insertion circuit |
| JPH0349511Y2 (en) * | 1982-11-11 | 1991-10-22 | ||
| JPS6335117A (en) * | 1986-07-28 | 1988-02-15 | 株式会社アムテックス | Overcurrent protection circuit of electronic circuit device |
| US5028823A (en) * | 1988-08-06 | 1991-07-02 | Mitsubishi Denki Kabushiki Kaisha | Delay device with intermittent capacitor discharge |
| WO2008097678A1 (en) * | 2007-02-08 | 2008-08-14 | Allegro Microsystems, Inc. | Integrated fault output/fault response delay circuit |
| US7573393B2 (en) | 2007-02-08 | 2009-08-11 | Allegro Microsystems, Inc. | Integrated fault output/fault response delay circuit |
| JP4887432B2 (en) * | 2007-02-08 | 2012-02-29 | アレグロ・マイクロシステムズ・インコーポレーテッド | Integrated fault output / fault response delay circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| GB1475101A (en) | Method of and apparatus for producing a subnanosecond pulse | |
| JPS5625290A (en) | Semiconductor circuit | |
| US3048708A (en) | Pulse timing control circuit | |
| SE7903623L (en) | IGNITIONS FOR SEQUENTIAL IGNITION OF EXPLOSIVES | |
| JPS51149530A (en) | Starting circuit for an inverter | |
| JPS5619223A (en) | Pulse duration expanding device | |
| US3787738A (en) | Pulse producing circuit | |
| JPS57131118A (en) | Pulse generator | |
| SU450320A1 (en) | Multivibrator | |
| SU454671A1 (en) | Pending asymmetric multivibrator | |
| SU826553A1 (en) | Controllable one-shot multivibrator | |
| SU900411A1 (en) | One-shot multivibrator | |
| JPS5471966A (en) | Low frequency amplifier circuit | |
| SU968889A2 (en) | One-shot multivibrator | |
| SU785901A1 (en) | Switching-over device | |
| SU410535A1 (en) | ||
| JPS54156616A (en) | Muting circuit | |
| SU586551A1 (en) | Device for shaping pulse signals | |
| JPS57183567A (en) | Contactless ignition device | |
| SU664295A1 (en) | Device for resetting digital automatics circuits to initial state | |
| SU503251A1 (en) | Time-impulse dividing device | |
| SU627583A1 (en) | Pulsed modulator | |
| SU758120A1 (en) | Device for preventing bounce of contacts | |
| JPS56160134A (en) | Pulse generating circuit | |
| KR830004938A (en) | Discharge machining power |