JPS5976144U - Pulse insertion circuit - Google Patents

Pulse insertion circuit

Info

Publication number
JPS5976144U
JPS5976144U JP17200982U JP17200982U JPS5976144U JP S5976144 U JPS5976144 U JP S5976144U JP 17200982 U JP17200982 U JP 17200982U JP 17200982 U JP17200982 U JP 17200982U JP S5976144 U JPS5976144 U JP S5976144U
Authority
JP
Japan
Prior art keywords
pulse signal
light emitting
emitting diode
threshold voltage
power source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17200982U
Other languages
Japanese (ja)
Other versions
JPH0349511Y2 (en
Inventor
彰 佐野
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP17200982U priority Critical patent/JPS5976144U/en
Publication of JPS5976144U publication Critical patent/JPS5976144U/en
Application granted granted Critical
Publication of JPH0349511Y2 publication Critical patent/JPH0349511Y2/ja
Granted legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の一実施例の概略ブロック図である。 第2図は第1図に含まれる電流源の具体的な電気回路図
である。第3図は同じくしきい値電圧検出回路の具体的
な電気回路図である。第4図は第1図に示す各部の波形
図である6図において、1はリモコン信号発生器、2は
電流源、3は発光ダイオード、4はコンデンサ、5は抵
抗、6は直流電源、7はしきい値電圧検出回路、8は挿
入信号発生器、9は送信部を示す。 トーー リモコン儲」−
FIG. 1 is a schematic block diagram of an embodiment of this invention. FIG. 2 is a specific electrical circuit diagram of the current source included in FIG. 1. FIG. 3 is also a specific electrical circuit diagram of the threshold voltage detection circuit. FIG. 4 is a waveform diagram of each part shown in FIG. 8 represents a threshold voltage detection circuit, 8 represents an insertion signal generator, and 9 represents a transmitter. To-remote control profit”-

Claims (2)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)パルス信号を発生するパルス信号発生手段、直流
電源、 前記パルス信号発生手段出力に応じて、前記直流電源か
ら電流を流す電流源、 前記直流電源と前記電流源との間に接続される発光ダイ
オード、 前記発光ダイオードに対して並列接続される− コンデ
ンサ、 前記発光ダイオードに対して並列接続される抵抗、およ
び 前記電流源と前記発光ダイオードとの接続点に接続され
、この接続点における電圧が予め定めるしきい値電圧を
越えたとき前記パルス信号より遅延した信号を出力する
しきい値電圧検出手段を備えた、遅延回路。
(1) A pulse signal generating means for generating a pulse signal, a DC power source, a current source for causing current to flow from the DC power source in accordance with the output of the pulse signal generating means, and connected between the DC power source and the current source. a light emitting diode, a capacitor connected in parallel to the light emitting diode, a resistor connected in parallel to the light emitting diode, and a connection point between the current source and the light emitting diode, the voltage at this connection point being A delay circuit comprising threshold voltage detection means for outputting a signal delayed from the pulse signal when a predetermined threshold voltage is exceeded.
(2)さらに、前記しきい値電圧検出手段から出力され
た信号を前記パルス信号発生手段から出力される信号と
パルス信号との間に挿入する手段を含む、実用新案登録
請求の範囲第1項記載の遅延回路。
(2) Utility model registration claim 1, further comprising means for inserting the signal output from the threshold voltage detection means between the signal output from the pulse signal generation means and the pulse signal. Delay circuit as described.
JP17200982U 1982-11-11 1982-11-11 Pulse insertion circuit Granted JPS5976144U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17200982U JPS5976144U (en) 1982-11-11 1982-11-11 Pulse insertion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17200982U JPS5976144U (en) 1982-11-11 1982-11-11 Pulse insertion circuit

Publications (2)

Publication Number Publication Date
JPS5976144U true JPS5976144U (en) 1984-05-23
JPH0349511Y2 JPH0349511Y2 (en) 1991-10-22

Family

ID=30375063

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17200982U Granted JPS5976144U (en) 1982-11-11 1982-11-11 Pulse insertion circuit

Country Status (1)

Country Link
JP (1) JPS5976144U (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4831945U (en) * 1971-08-20 1973-04-18
JPS4832455A (en) * 1971-08-30 1973-04-28
JPS5225610A (en) * 1975-08-22 1977-02-25 Hitachi Ltd Dropout compensation circuit
JPS5619223A (en) * 1979-07-25 1981-02-23 Mitsubishi Electric Corp Pulse duration expanding device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4831945U (en) * 1971-08-20 1973-04-18
JPS4832455A (en) * 1971-08-30 1973-04-28
JPS5225610A (en) * 1975-08-22 1977-02-25 Hitachi Ltd Dropout compensation circuit
JPS5619223A (en) * 1979-07-25 1981-02-23 Mitsubishi Electric Corp Pulse duration expanding device

Also Published As

Publication number Publication date
JPH0349511Y2 (en) 1991-10-22

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