JPS5616349A - Simultaneous serial data transfer unit - Google Patents

Simultaneous serial data transfer unit

Info

Publication number
JPS5616349A
JPS5616349A JP9244679A JP9244679A JPS5616349A JP S5616349 A JPS5616349 A JP S5616349A JP 9244679 A JP9244679 A JP 9244679A JP 9244679 A JP9244679 A JP 9244679A JP S5616349 A JPS5616349 A JP S5616349A
Authority
JP
Japan
Prior art keywords
pulse
circuit
blocks
block
output data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9244679A
Other languages
Japanese (ja)
Inventor
Takahiro Shiratani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9244679A priority Critical patent/JPS5616349A/en
Publication of JPS5616349A publication Critical patent/JPS5616349A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE:To decrease the input/output data lines and thus simplify the structure of the interface to secure a high accuracy, by realizing a simultaneous serial transfer of the data through three units of periodical pulses. CONSTITUTION:Start pulse P1 generated from pulse generating circuit 23, pulse train P2 having the pulse number of maximum data length and sample pulse train P3 are sent to control circuit 8a of control block 2. At the same time, pulses P1, P2 and PP3 are sent to circuit 8a via driver circuit 18 of pulse generating circuit 10 plus receiver 19 of control circuit 8b within blocks 1a and so on. In such constitution, the input data within blocks 1a and so on can be transferred input data register file 11a in block 2. And at the same time, the output data of output data register file 12 in block 2 can be transferred into blocks 1a and so on.
JP9244679A 1979-07-18 1979-07-18 Simultaneous serial data transfer unit Pending JPS5616349A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9244679A JPS5616349A (en) 1979-07-18 1979-07-18 Simultaneous serial data transfer unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9244679A JPS5616349A (en) 1979-07-18 1979-07-18 Simultaneous serial data transfer unit

Publications (1)

Publication Number Publication Date
JPS5616349A true JPS5616349A (en) 1981-02-17

Family

ID=14054624

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9244679A Pending JPS5616349A (en) 1979-07-18 1979-07-18 Simultaneous serial data transfer unit

Country Status (1)

Country Link
JP (1) JPS5616349A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5326602A (en) * 1976-08-25 1978-03-11 Fujitsu Ltd Informa tion transfer system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5326602A (en) * 1976-08-25 1978-03-11 Fujitsu Ltd Informa tion transfer system

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