JPS56154826A - Input selection system - Google Patents
Input selection systemInfo
- Publication number
- JPS56154826A JPS56154826A JP5762780A JP5762780A JPS56154826A JP S56154826 A JPS56154826 A JP S56154826A JP 5762780 A JP5762780 A JP 5762780A JP 5762780 A JP5762780 A JP 5762780A JP S56154826 A JPS56154826 A JP S56154826A
- Authority
- JP
- Japan
- Prior art keywords
- input
- output
- signal
- inputted
- corresponds
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
- H03K17/62—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors
Landscapes
- Electronic Switches (AREA)
Abstract
PURPOSE:To perform input selection which has no influence upon an output signal even if an unselected input is reduced to ''0'' ro ''1'', by using a repetitive pulse train signal as the assigned signal that corresponds to input data to be selected and by providing a detecting means. CONSTITUTION:Assigned signal g0 that corresponds to input data do inputted from the transmitting circuit of system 0 as an in-uses system use a repetitive pulse train signal, and assigned signal g1 that corresponds to input data d1 inputted from the transmitting circuit of system 1 as a stand-by system uses ''0''. Then, signals g0 and g1 are inputted from input terminals G0 and G1 and led to monostable multivibrators M0 and M1, whose output m0 is ANDed with data d0; output a0 has the same type with input d0, and the other output m1 is held at ''0'' while AND output a1 is at ''0''. Output (d) of OR 0 between those signals a0 and a1 is equal to input d0 and even if the unselected input is reduced to ''0'' or ''1'', the input selection is done without influencing the output signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5762780A JPS56154826A (en) | 1980-04-30 | 1980-04-30 | Input selection system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5762780A JPS56154826A (en) | 1980-04-30 | 1980-04-30 | Input selection system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56154826A true JPS56154826A (en) | 1981-11-30 |
Family
ID=13061117
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5762780A Pending JPS56154826A (en) | 1980-04-30 | 1980-04-30 | Input selection system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56154826A (en) |
-
1980
- 1980-04-30 JP JP5762780A patent/JPS56154826A/en active Pending
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