JPS56153863A - Pcm line switching system - Google Patents

Pcm line switching system

Info

Publication number
JPS56153863A
JPS56153863A JP5725180A JP5725180A JPS56153863A JP S56153863 A JPS56153863 A JP S56153863A JP 5725180 A JP5725180 A JP 5725180A JP 5725180 A JP5725180 A JP 5725180A JP S56153863 A JPS56153863 A JP S56153863A
Authority
JP
Japan
Prior art keywords
stand
lines
current
terminal switch
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5725180A
Other languages
Japanese (ja)
Inventor
Hiromi Hashimoto
Hideaki Morimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5725180A priority Critical patent/JPS56153863A/en
Publication of JPS56153863A publication Critical patent/JPS56153863A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/22—Arrangements for detecting or preventing errors in the information received using redundant apparatus to increase reliability

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To switch lines without momentary disconnection, by eliminating the signal delay difference between current and stand-by lines to add signals of both lines simply, in the radio PCM lines equipped with the stand-by system. CONSTITUTION:The transmission terminal switch of the current line to be switched is driven to put the signal of the current line onto stand-by line 19. Next, delay time difference measuring circuit 23 is connected to receiving terminal switch 16, and delay adjusting circuit 21S on stand-by line 19 is so adjusted that this circuit is adapted to the delay difference between current and stand-by routes. Next, when receiving terminal switch 16 is driven, signals matched to each other in respect to time between stand-by and current lines are added simply by bridge type receiving terminal switch 16, and thus, lines are switched without momentary disconnection.
JP5725180A 1980-04-28 1980-04-28 Pcm line switching system Pending JPS56153863A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5725180A JPS56153863A (en) 1980-04-28 1980-04-28 Pcm line switching system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5725180A JPS56153863A (en) 1980-04-28 1980-04-28 Pcm line switching system

Publications (1)

Publication Number Publication Date
JPS56153863A true JPS56153863A (en) 1981-11-28

Family

ID=13050303

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5725180A Pending JPS56153863A (en) 1980-04-28 1980-04-28 Pcm line switching system

Country Status (1)

Country Link
JP (1) JPS56153863A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6348026A (en) * 1986-08-15 1988-02-29 Fujitsu Ltd Delay time difference supervisory circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6348026A (en) * 1986-08-15 1988-02-29 Fujitsu Ltd Delay time difference supervisory circuit

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